A CPU has a 32 KB direct mapped cache with 128 byte block size. Suppose A is a 2 dimensional array of size 512×512 with elements that occupy 8 bytes each. Consider the code segment
for (i =0; i < 512; i++) { for (j =0; j < 512; j++) { x += A[i][j]; }}
Assuming that array is stored in order A[0][0], A[0][1], A[0][2]……, the number of cache misses is
(A) 16384
(B) 512
(C) 2048
(D) 1024
Home Modern › Forums › ISRO › A CPU has a 32 KB direct mapped cache with 128 byte block size. Suppose A is a 2 dimensional array of size 512×512 with elements that occupy 8 bytes each. Consider the code segment Assuming that array is stored in order A[0][0], A[0][1], A[0][2]……, the number of cache misses is A CPU has a 32 KB direct mapped cache with 128 byte block size. Suppose A is a 2 dimensional array of size 512×512 with elements that occupy 8 bytes each. Consider the code segment Assuming that array is stored in order A[0][0], A[0][1], A[0][2]……, the number of cache misses isfor (i =0; i < 512; i++) { for (j =0; j < 512; j++) { x += A[i][j]; }}
(A) 16384
(B) 512
(C) 2048
(D) 1024for (i =0; i < 512; i++) { for (j =0; j < 512; j++) { x += A[i][j]; }}
(A) 16384
(B) 512
(C) 2048
(D) 1024
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