DMA In maximum mode (MN/MX’=0)

1.	DMA In maximum mode (MN/MX’=0)
Answer» DMA In maximum mode (MN/MX’=0):- In maximum mode two signal RQ’/GT0’ and RQ1’/GT1’ are used for direct memory access operation. The DMA request and DMA acknowledgment signal are received on same line. Thus RQ’/GT0’ and RQ1’/GT1’ are two channels for DMA by which two separate external devices can access memory directly. The external device make a request for DMA by sending a low pulse at RQ’/GT’ ,The 8086 microprocessor samples the RQ’/GT’ signal at low to high transition of clock period. The 8086 microprocessor acknowledgement the DMA request at the end of current bus cycle by sending a low pulse on the same RQ’/GT’ pin .The address/data and control signal float at the same time. After competition of memory operation the external devices informs the 8086 microprocessor by sending a low pulse on the RQ”/GT’ pin .The 8086 microprocessor by sending a low on this pin and low –to-high transition of clock regains the control of lines.

Answer»

DMA In maximum mode (MN/MX’=0):-

In maximum mode two signal RQ’/GT0’ and RQ1’/GT1’ are used for direct memory access operation.
The DMA request and DMA acknowledgment signal are received on same line.
Thus RQ’/GT0’ and RQ1’/GT1’ are two channels for DMA by which two separate external devices can access memory directly.
The external device make a request for DMA by sending a low pulse at RQ’/GT’ ,The 8086 microprocessor samples the RQ’/GT’ signal at low to high transition of clock period.
The 8086 microprocessor acknowledgement the DMA request at the end of current bus cycle by sending a low pulse on the same RQ’/GT’ pin .The address/data and control signal float at the same time.
After competition of memory operation the external devices informs the 8086 microprocessor by sending a low pulse on the RQ”/GT’ pin .The 8086 microprocessor by sending a low on this pin and low –to-high transition of clock regains the control of lines.

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