1.

Explain The Combinational Logic Design Process?

Answer»

Combinational Logic Design Process : 

  • Create truth table from specification
  • Generate K-maps & obtain logic equations
  • Draw logic diagram (sharing common gates)
  • Simulate circuit for design verification
    • Debug & FIX problems when OUTPUT is incorrect
  • Check truth table against K-map population
  • Check K-map groups against logic EQUATION product terms
  • Check logic equations against schematic
  • Circuit optimization for area and/or performance
    • Analyze verified circuit for optimization metric

•G, GIO, Gdel, Pdel

    • USE Boolean postulates & theorems
  • Re -simulate & verify optimized design

Combinational Logic Design Process : 

•G, GIO, Gdel, Pdel


Discussion

No Comment Found

Related InterviewSolutions