In order to obtain an output `Y=1` form the circuit of fig. the inputs must be A. `{:(A,B,C),(0,1,0):}`B. `{:(A,B,C),(1,0,0):}`C. `{:(A,B,C),(1,0,0):}`D. `{:(A,B,C),(1,1,0):}`

In order to obtain an output `Y=1` form the circuit of fig. the inputs

1.	In order to obtain an output `Y=1` form the circuit of fig. the inputs must be A. `{:(A,B,C),(0,1,0):}`B. `{:(A,B,C),(1,0,0):}`C. `{:(A,B,C),(1,0,0):}`D. `{:(A,B,C),(1,1,0):}`
Answer» Correct Answer - C `A+B=1` `C=1` So, `AND` gate responds.

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In order to obtain an output `Y=1` form the circuit of fig. the inputs must be A. `{:(A,B,C),(0,1,0):}`B. `{:(A,B,C),(1,0,0):}`C. `{:(A,B,C),(1,0,0):}`D. `{:(A,B,C),(1,1,0):}`

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