In the TTL circuit in the figure, S to S are select lines and X to X are input lines. S and X are LSBs. The output Y is

In the TTL circuit in the figure, S to S are select lines and X to X a

1.	In the TTL circuit in the figure, S to S are select lines and X to X are input lines. S and X are LSBs. The output Y is
Answer» The MUX is made up of TTL circuit. For TTL circuit open terminal is taken high, since S2 select line is connected to OR gate whose one terminal connected to C and the other is open (high) so OR gate output is S2 = 1 + C = 1. S2 = 1 S1(B) S0(A) Y 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 0 Y = S0⊕S1 => A⊕B.