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To get an output `y=1` from the circuit shown below, the input must be A. `{:(A,B,C),(0,1,0):}`B. `{:(A,B,C),(0,0,1):}`C. `{:(A,B,C),(1,0,1):}`D. `{:(A,B,C),(1,0,0):}` |
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Answer» Correct Answer - C In the figure A,B are inputs of OP gate whose output is `Y_(1)`. `|:(A,B,Y_(1)),(0,1,1),(0,0,0),(1,0,1),(1,0,1):}:|` Again `Y_(1)` and `C` are inputs of And gate `|{:(Y_(1),C,Y),(1,0,0),(0,1,0),(1,1,1),(1,0,0):}:|` To get an output `Y =1`, the inputs must be `(1,0,1)` |
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