Addressing Modes :

Addressing modes are an asset of the instruction set architecture in most CPU designs. The various addressing modes that are defined in a given instruction set architecture define how machine language instructions in that architecture identity the operand of each instruction. An addressing mode specifies how to calculate the effective memory address of an operand by using information held in register and/or constants contained within machine instruction or elsewhere. 

For 8085 there are five addressing modes. 

They are:

(i) DIRECT ADDRESSING MODE

In type of addressing mode the address of the operand or the data is given to the instruction itself. This type of mode is used to accept data from outside devices to store the data in the accumulator and send the data stored in the accumulator to the output devices. 

E.g. IN 02 (to accept the data from the port 02h and store the same in the accumulator) 

OUT 01H (send the data from the accumulator to the output port) 

LHLD address (load H-L pair direct.)

(ii) REGISTER ADDRESSING MODE 

In type of addressing mode the address is provided through the registers. Here the operand is GPR. 

E.g. MOV Rd,Rs (move a copy of data from the source register to the destination register) 

ADD B (add the content of b to the accumulator and the value is stored in the accumulator) 

INR C (Increment the value of the register c by 1) 

(iii) REGISTER INDIRECT ADDRESSING MODE

In type of addressing mode the address of the operand or the data is specified by a pair of register before the execution of the instruction itself. Here the address of the memory is not directly given in the instruction. The address of the memory resides in H-L pair and this has been already specified in an earlier instruction. 

E.g. LXI H, 8175; MOV B, M (move the data from memory specified by H-l pair to the register b)

LXI H, 8763; ADD M (Add the content of memory specified of the H-L pair to the accumulator)  

(iv) IMMEDIATE ADDRESSING MODE

in type of addressing mode the data is directly associated in the instruction itself. It loads immediate data to the destination provided in the instruction. 

E.g. MVI r. D8 (move an 8 it data directly to the register) 

ADI 62H (add 62 to the accumulator content and store the result in the accumulator) 

JMP address, JC address, CPI D8.

(v) IMPLICIT ADDRESSING MODE 

There are certain instruction which are operated on the content of the accumulator. These types of construction don’t require any address of the operand.

Eg. CMA (it finds the 1’s compliment of the data present in the accumulator and stores in accumulator)

RAL (rotate the content of accumulator left through carry) 

RRC (rotate the content of accumulator right without carry)