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Correct option is (b) 4

Explanation: 4 basic BINARY subtraction OPERATIONS (0-0, 1-0, 0-1, 1-1) are possible.

0 – 0 = 0

0 – 1 = 1 ( BORROW 1)

1 – 0 = 1

1 – 1 = 0

The CORRECT answer is (c) The minuend is left in its ORIGINAL form and the SUBTRAHEND is changed to its 2’s-COMPLEMENT

To EXPLAIN: When performing subtraction by addition in the 2’s-complement system, the minuend is left in its original form and the subtrahend is changed to its 2’s-complement. It is then added to the minuend. If the result has carry, then it’s dropped and that’s the final answer. Else, if the result has no carry, then the result is again converted to it’s 2’s complement form and that’s the final answer with a ‘negative’ sign.

Correct choice is (d) Experience in HDL

Easy explanation: HDL STANDS for Hardware Description Language.In order to use a macro function, ONE needs to have experience in HDL for representing the structure and behaviour of DIGITAL circuits.

Correct choice is (a) Ex-NOR gate

Easiest EXPLANATION: EX-OR gate gives 1 if both inputs are DIFFERENT means 0 or 1 and gives 0 if both are same and EX-NOR is OPPOSITE of EX-OR gate, so it provides a HIGH output for both inputs HIGH or both inputs are LOW. Thus, EX-NOR produces output for even number of 1’s or all 0s, while EXOR produces output for odd number of 1’s.

The CORRECT OPTION is (c) Both controlled BUFFER and NOT gate

Explanation: Controlled INVERTER is also known as controlled buffer and NOT gate as well. It is used between output and a bus so that one can control whether the output is FED to the bus or not.

Right answer is (c) VARIABLES within the LOOP that appear in both complemented and uncomplemented form

The EXPLANATION: Looping on a K-map always RESULTS in the ELIMINATION of variables within the loop that appear in both complemented and uncomplemented form.

Right answer is (c) Boolean ALGEBRA and Karnaugh MAPPING

Best explanation: The TWO BEST methods of logic circuit simplification are Boolean algebra and Karnaugh mapping. Boolean Algebra uses the LAWS of Boolean Algebra for minimization of Boolean expressions while Karnaugh Map is a pictorial REPRESENTATION and reduction of the Boolean expression.

Right option is (a) A HIGH for each input truth table condition that produces a HIGH output

For explanation: Each “0” entry in a K-map SQUARE REPRESENTS a LOW output for all POSSIBLE HIGH input conditions. Thus, it represents MAXTERM.

Right option is (c) Using BOOLEAN ALGEBRA

To explain I would say: The systematic REDUCTION of logic CIRCUITS is ACCOMPLISHED by using boolean algebra.

Right CHOICE is (B) DeMorgan’s SECOND theorem

To explain: DeMorgan’s Law: ~(P+Q) <=> (~P).(~Q) Also,

~(P.Q) <=> (~P)+(~Q).

Correct answer is (d) A • B = B • A

The explanation is: The commutative LAW of multiplication is (A * B) = (B * A).

The commutative law of addition is (A + B) = (B + A).

The correct option is (b) The STATUS bit CONDITIONS

For EXPLANATION: In an ALU, status bit conditions are sometimes CALLED CONDITION code bits or flag bits. It is so called because they tend to represent the status of the respect flags after any operation.

The correct option is (c) An overflow condition

For EXPLANATION I would say: If the two NUMBERS include a SIGN bit in the highest order position, the bit CONDITIONS of interest are the sign of the RESULT, a zero indication and an overflow condition.

Right ANSWER is (d) NAND and NOR OPERATIONS

The explanation: SINCE, the logic gates NORand NAND are known as universal logic gates, therefore it can be used to design all the THREE BASIC gates AND, OR and NOT. Thus, it means that any operations can be obtained by implementation of these gates.

The CORRECT choice is (B) Combinational logic

The best explanation: The design of an ALU is based on combinational logic. Because the UNIT has a regular pattern, it can be BROKEN into identical stages connected in cascade through CARRIES.

The correct choice is (c) Both past output and present input

For explanation: In a sequential circuit, the output at any TIME depends on the present input values as well as past output values. It also depends on CLOCK PULSES depending whether it’s synchronous or ASYNCHRONOUS sequential circuits.

The correct CHOICE is (C) Input values

To elaborate: In a combinational circuit, the OUTPUT at any time DEPENDS only on the input values at that time and not on past or intermediate values.

Right option is (a) 2

To EXPLAIN: A digital SYSTEM consists of two TYPES of circuits and these are combinational and sequential logic circuit. Combinational circuits are the ones which do not depend on previous inputs while Sequential circuits depend on PAST inputs.

Correct option is (b) ADDERS

Explanation: The basic building blocks of the arithmetic UNIT in a digital computers are adders. Since, a parallel adder is constructed with a number of full-adder circuits connected in cascade. By CONTROLLING the data inputs to the parallel adder, it is POSSIBLE to obtain different types of arithmetic OPERATIONS.

Correct answer is (b) A XOR B XOR X

The EXPLANATION: The difference OUTPUT of a subtractor is GIVEN by (if A, B and X are the INPUTS) A XOR B XOR X.

Right answer is (b) 3 bits

To explain: Full subtractor is used to perform subtraction of 3 bits, namely minuend bit, subtrahend bit and borrow from the previous stage. HOWEVER, it also PRODUCES 2 OUTPUTS BORROW and DIFFERENCE.

Correct option is (C) Its inputs

To explain I would say: Minuend and SUBTRAHEND are the TWO bits of input of a subtractor. If A and B are the two inputs of a subtractor then A is called minuend and B as subtrahend.

The correct answer is (b) A’ AND B

The BEST explanation: The BORROW of a subtractor is received through AND gate whose ONE input is inverted. On that BASIS the borrow will be (A’ AND B).

Correct choice is (a) A XOR B

The EXPLANATION is: The subtractor has TWO OUTPUTS BORROW and DIFFERENCE. SINCE the difference output of a subtractor is given by AB’ + BA’ and this is the output of a XOR gate. So, the final difference output is AB’ + BA’.

The correct ANSWER is (a) 0

The best I can explain: The output for A = B will be 0. If A = B, it MEANS that A = B = 0 or A = B = 1. In both of the situation subtractor GIVES 0 as the output.

Right answer is (b) Borrow

To explain I would say: For subtracting 1 from 0, we use to TAKE a borrow from neighbouring bits because CARRY is TAKEN into consideration during addition PROCESS.

Correct answer is (b) 2

Easy EXPLANATION: There are two outputs required for the IMPLEMENTATION of a SUBTRACTOR. ONE for the DIFFERENCE and another for borrow.

Right answer is (a) 2 bits

The best explanation: Half subtractor is a COMBINATIONAL circuit which is USED to PERFORM subtraction of two bits, namely MINUEND and subtrahend and produces two outputs, borrow and difference.

Correct ANSWER is (B) 2, 1, 2

Explanation: There are 2 AND, 1 OR and 2 EXOR gates required for the configuration of full adder, PROVIDED using HALF adder. Otherwise, configuration of full adder would REQUIRE 3 AND, 2 OR and 2 EXOR.

Right choice is (a) A AND B OR (A OR B) AND C

The best explanation: If A, B and C are the inputs of a full adder then the CARRY is given by A AND B OR (A OR B) AND C, which is EQUIVALENT to (A AND B) OR (B AND C) OR (C AND A).

Correct option is (c) A XOR B

The explanation is: If A and B are the inputs of a half adder, the sum is given by A XOR B, while the CARRY is given by A AND B.

The CORRECT ANSWER is (a) 2

Easiest explanation: Total number of inputs in a HALF ADDER is two. SINCE an EXOR gates has 2 inputs and carry is connected with the input of EXOR gates. The output of half-adder is also 2, them being, SUM and CARRY. The output of EXOR gives SUM and that of AND gives carry.

The correct answer is (B) Addition

The EXPLANATION is: In addition, carry is OBTAINED. For example: 1 0 1 + 1 1 1 = 1 0 0; in this example carry is obtained after 1st addition (i.e. 1 + 1 = 1 0). In subtraction, BORROW is obtained. LIKE, 0 – 1 = 1 (borrow 1).

The correct option is (d) All of the Mentioned

For EXPLANATION I WOULD say: Adders are used to perform the operation of ADDITION. THUS, in parts of the processor, adders are used to CALCULATE addresses, table indices, increment and decrement operators, and similar operations.