Explore topic-wise InterviewSolutions in .

This section includes InterviewSolutions, each offering curated multiple-choice questions to sharpen your knowledge and support exam preparation. Choose a topic below to get started.

1.

Which memory device is generally made of semiconductors?(a) RAM(b) Hard-disk(c) Floppy disk(d) Cd diskThis question was addressed to me in unit test.The question is from Functional Units of a Computer topic in portion Basic Structures of Computers of Computer Architecture

Answer»

Right answer is (a) RAM

For EXPLANATION: Memory DEVICES are usually made of SEMICONDUCTORS for FASTER manipulation of the contents.

2.

The average number of steps taken to execute the set of instructions can be made to be less than one by following _______(a) ISA(b) Pipe-lining(c) Super-scaling(d) SequentialThe question was posed to me during an interview.This intriguing question comes from Performance of a System in division Basic Structures of Computers of Computer Architecture

Answer»

Right option is (c) Super-scaling

Explanation: The number of steps required to execute a GIVEN set of INSTRUCTIONS is SUFFICIENTLY REDUCED by USING super-scaling. In this method, a set of instructions are grouped together and are processed.

3.

Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster?(a) A(b) B(c) Both take the same time(d) Insufficient informationThe question was posed to me during an internship interview.My doubt is from Performance of a System in section Basic Structures of Computers of Computer Architecture

Answer»

The correct answer is (a) A

The best explanation: The performance of a SYSTEM can be FOUND out using the BASIC performance formula.

4.

The internal components of the processor are connected by _______(a) Processor intra-connectivity circuitry(b) Processor bus(c) Memory bus(d) RambusThe question was asked during an online exam.My enquiry is from Basic Operational Concept topic in division Basic Structures of Computers of Computer Architecture

Answer»

Correct answer is (B) Processor bus

Best explanation: The processor BUS is used to connect the VARIOUS parts in order to provide a DIRECT connection to the CPU.

5.

During the execution of a program which gets initialized first?(a) MDR(b) IR(c) PC(d) MARI had been asked this question during an interview for a job.Asked question is from Basic Operational Concept in portion Basic Structures of Computers of Computer Architecture

Answer»

Correct choice is (C) PC

To ELABORATE: For the execution of a process FIRST the instruction is PLACED in the PC.

6.

The instruction -> Add LOCA, R0 does _______(a) Adds the value of LOCA to R0 and stores in the temp register(b) Adds the value of R0 to the address of LOCA(c) Adds the values of both LOCA and R0 and stores it in R0(d) Adds the value of LOCA with a value in accumulator and stores it in R0I got this question in homework.This key question is from Basic Operational Concept in chapter Basic Structures of Computers of Computer Architecture

Answer» CORRECT answer is (c) Adds the VALUES of both LOCA and R0 and stores it in R0

To elaborate: NONE.
7.

The small extremely fast, RAM’s are called as _______(a) Cache(b) Heaps(c) Accumulators(d) StacksI had been asked this question in a national level competition.This intriguing question originated from Functional Units of a Computer topic in division Basic Structures of Computers of Computer Architecture

Answer»

Right OPTION is (a) Cache

The explanation is: These small and FAST memory devices are compared to RAM because they optimize the performance of the system and they only KEEP files which are required by the current process in them

8.

The 8-bit encoding format used to store data in a computer is ______(a) ASCII(b) EBCDIC(c) ANCI(d) USCIIThis question was posed to me in homework.Question is taken from Functional Units of a Computer in section Basic Structures of Computers of Computer Architecture

Answer»

The correct OPTION is (B) EBCDIC

For explanation: The data to be stored in the computers have to be ENCODED in a particular WAY so as to provide secure processing of the data.

9.

If a processor clock is rated as 1250 million cycles per second, then its clock period is ________(a) 1.9 * 10^-10 sec(b) 1.6 * 10^-9 sec(c) 1.25 * 10^-10 sec(d) 8 * 10^-10 secThe question was posed to me during a job interview.The question is from Performance of a System in chapter Basic Structures of Computers of Computer Architecture

Answer»

The CORRECT CHOICE is (d) 8 * 10^-10 sec

For EXPLANATION: NONE.

10.

The ultimate goal of a compiler is to ________(a) Reduce the clock cycles for a programming task(b) Reduce the size of the object code(c) Be versatile(d) Be able to detect even the smallest of errorsThis question was posed to me in an international level competition.My question is from Performance of a System in portion Basic Structures of Computers of Computer Architecture

Answer» RIGHT ANSWER is (a) REDUCE the clock cycles for a programming task

Explanation: None.
11.

The control unit controls other units by generating ___________(a) Control signals(b) Timing signals(c) Transfer signals(d) Command SignalsI got this question by my college professor while I was bunking the class.The doubt is from Functional Units of a Computer in section Basic Structures of Computers of Computer Architecture

Answer»

Right answer is (b) Timing signals

Easiest explanation: This UNIT is USED to CONTROL and coordinate between the VARIOUS PARTS and components of the CPU.

12.

IBM developed a bus standard for their line of computers ‘PC AT’ called _____(a) IB bus(b) M-bus(c) ISA(d) None of the mentionedI have been asked this question in examination.I'd like to ask this question from BUS Structure in portion Basic Structures of Computers of Computer Architecture

Answer»

The CORRECT OPTION is (C) ISA

Explanation: NONE.

13.

______ is used to choose between incrementing the PC or performing ALU operations.(a) Conditional codes(b) Multiplexer(c) Control unit(d) None of the mentionedThe question was posed to me during an internship interview.My doubt stems from Basic Operational Concept topic in chapter Basic Structures of Computers of Computer Architecture

Answer» RIGHT answer is (B) Multiplexer

The best explanation: The multiplexer circuit is used to choose between the two as it can give different results BASED on the INPUT.
14.

Which of the register/s of the processor is/are connected to Memory Bus?(a) PC(b) MAR(c) IR(d) Both PC and MARThis question was posed to me by my college director while I was bunking the class.The origin of the question is Basic Operational Concept topic in portion Basic Structures of Computers of Computer Architecture

Answer»

The CORRECT choice is (B) MAR

Explanation: MAR is connected to the memory BUS in order to ACCESS the memory.

15.

The main advantage of multiple bus organisation over a single bus is _____(a) Reduction in the number of cycles for execution(b) Increase in size of the registers(c) Better Connectivity(d) None of the mentionedI had been asked this question in an online quiz.I want to ask this question from BUS Structure topic in section Basic Structures of Computers of Computer Architecture

Answer»

The correct OPTION is (a) REDUCTION in the number of CYCLES for execution

Explanation: NONE.

16.

ANSI stands for __________(a) American National Standards Institute(b) American National Standard Interface(c) American Network Standard Interfacing(d) American Network Security InterruptI have been asked this question by my school teacher while I was bunking the class.I'd like to ask this question from BUS Structure topic in section Basic Structures of Computers of Computer Architecture

Answer»

Correct choice is (a) AMERICAN National Standards Institute

For EXPLANATION: NONE.

17.

When Performing a looping operation, the instruction gets stored in the ______(a) Registers(b) Cache(c) System Heap(d) System stackThe question was asked in an interview.My enquiry is from Performance of a System topic in chapter Basic Structures of Computers of Computer Architecture

Answer»

Right choice is (B) CACHE

Explanation: When a looping or branching OPERATION is carried out the offset value is STORED in the cache along with the DATA.

18.

The ______ format is usually used to store data.(a) BCD(b) Decimal(c) Hexadecimal(d) OctalI have been asked this question in a job interview.Enquiry is from Functional Units of a Computer topic in chapter Basic Structures of Computers of Computer Architecture

Answer»

The CORRECT option is (a) BCD

Explanation: The data usually used by COMPUTERS have to be stored and represented in a PARTICULAR format for EASE of use.

19.

CISC stands for _______(a) Complete Instruction Sequential Compilation(b) Computer Integrated Sequential Compiler(c) Complex Instruction Set Computer(d) Complex Instruction Sequential CompilationThe question was asked during an interview for a job.Asked question is from Performance of a System in section Basic Structures of Computers of Computer Architecture

Answer» CORRECT option is (c) COMPLEX Instruction Set Computer

The best explanation: CISC is a type of system ARCHITECTURE where complex INSTRUCTIONS are grouped TOGETHER and executed to improve system performance.
20.

The decoded instruction is stored in ______(a) IR(b) PC(c) Registers(d) MDRI had been asked this question in my homework.Question is taken from Basic Operational Concept in division Basic Structures of Computers of Computer Architecture

Answer» RIGHT OPTION is (a) IR

Easiest EXPLANATION: The instruction after obtained from the PC, is decoded and operands are FETCHED and stored in the IR.
21.

______ are used to overcome the difference in data transfer speeds of various devices.(a) Speed enhancing circuitory(b) Bridge circuits(c) Multiple Buses(d) Buffer registersI have been asked this question by my college professor while I was bunking the class.Question is taken from BUS Structure in division Basic Structures of Computers of Computer Architecture

Answer» CORRECT option is (d) Buffer registers

Best explanation: By USING Buffer registers, the processor SENDS the DATA to the I/O device at the processor speed and the data gets stored in the buffer. After that the data gets SENT to or from the buffer to the devices at the device speed.
22.

In multiple Bus organisation, the registers are collectively placed and referred as ______(a) Set registers(b) Register file(c) Register Block(d) Map registersThe question was posed to me in unit test.My question is from BUS Structure in portion Basic Structures of Computers of Computer Architecture

Answer»

Correct ANSWER is (B) Register file

The BEST I can explain: NONE.

23.

During the execution of the instructions, a copy of the instructions is placed in the ______(a) Register(b) RAM(c) System heap(d) CacheI had been asked this question by my college director while I was bunking the class.This intriguing question originated from Performance of a System topic in chapter Basic Structures of Computers of Computer Architecture

Answer» CORRECT CHOICE is (d) Cache

The BEST EXPLANATION: NONE.
24.

The ALU makes use of _______ to store the intermediate results.(a) Accumulators(b) Registers(c) Heap(d) StackThis question was addressed to me in an online quiz.Enquiry is from Functional Units of a Computer topic in chapter Basic Structures of Computers of Computer Architecture

Answer»

Right answer is (a) Accumulators

To elaborate: The ALU is the COMPUTATIONAL CENTER of the CPU. It performs all mathematical and LOGICAL operations. In order to perform better, it uses some internal memory spaces to store immediate results.

25.

The registers, ALU and the interconnection between them are collectively called as _____(a) process route(b) information trail(c) information path(d) data pathThe question was posed to me by my school teacher while I was bunking the class.The origin of the question is Basic Operational Concept topic in portion Basic Structures of Computers of Computer Architecture

Answer»

The CORRECT answer is (d) data PATH

The best explanation: The OPERATIONAL and processing PART of the CPU are collectively called as a data path.

26.

______ bus structure is usually used to connect I/O devices.(a) Single bus(b) Multiple bus(c) Star bus(d) RambusThe question was posed to me in semester exam.My question comes from Functional Units of a Computer topic in chapter Basic Structures of Computers of Computer Architecture

Answer»

Correct ANSWER is (a) SINGLE BUS

The BEST I can explain: BUS is a bunch of wires which carry ADDRESS, control signals and data. It is used to connect various components of the computer.

27.

An optimizing Compiler does _________(a) Better compilation of the given piece of code(b) Takes advantage of the type of processor and reduces its process time(c) Does better memory management(d) None of the mentionedThis question was addressed to me in semester exam.This intriguing question comes from Performance of a System topic in portion Basic Structures of Computers of Computer Architecture

Answer»

Right OPTION is (B) Takes advantage of the type of processor and reduces its process time

To explain: An optimizing compiler is a compiler designed for the specific purpose of increasing the operation speed of the processor by reducing the time TAKEN to compile the program instructions.

28.

A source program is usually in _______(a) Assembly language(b) Machine level language(c) High-level language(d) Natural languageI got this question during an online exam.My doubt stems from Functional Units of a Computer topic in section Basic Structures of Computers of Computer Architecture

Answer» CORRECT choice is (c) High-level language

For explanation I WOULD say: The program written and before being compiled or assembled is called as a SOURCE program.
29.

As of 2000, the reference system to find the performance of a system is _____(a) Ultra SPARC 10(b) SUN SPARC(c) SUN II(d) None of the mentionedI have been asked this question in semester exam.I'd like to ask this question from Performance of a System topic in chapter Basic Structures of Computers of Computer Architecture

Answer» CORRECT choice is (a) Ultra SPARC 10

Explanation: In SPEC SYSTEM of measuring a system’s PERFORMANCE, a system is used as a reference against which other systems are compared and performance is DETERMINED.
30.

_____ register Connected to the Processor bus is a single-way transfer capable.(a) PC(b) IR(c) Temp(d) ZI have been asked this question in an internship interview.My doubt stems from BUS Structure topic in chapter Basic Structures of Computers of Computer Architecture

Answer»

Right CHOICE is (d) Z

Explanation: The Z register is a SPECIAL register which can INTERACT with the processor BUS only.

31.

The bus used to connect the monitor to the CPU is ______(a) PCI bus(b) SCSI bus(c) Memory bus(d) RambusThis question was posed to me in final exam.My enquiry is from BUS Structure topic in portion Basic Structures of Computers of Computer Architecture

Answer»

Right option is (b) SCSI bus

Explanation: SCSI BUS is USUALLY USED to CONNECT video devices to the PROCESSOR.

32.

The main virtue for using single Bus structure is ____________(a) Fast data transfers(b) Cost effective connectivity and speed(c) Cost effective connectivity and ease of attaching peripheral devices(d) None of the mentionedThe question was asked in an interview for job.Question is taken from BUS Structure in section Basic Structures of Computers of Computer Architecture

Answer»

Correct answer is (c) Cost EFFECTIVE connectivity and ease of attaching peripheral devices

Explanation: By using a SINGLE BUS STRUCTURE we can minimize the amount of HARDWARE (WIRE) required and thereby reducing the cost.

33.

Which registers can interact with the secondary storage?(a) MAR(b) PC(c) IR(d) R0This question was posed to me in exam.This intriguing question originated from Basic Operational Concept topic in chapter Basic Structures of Computers of Computer Architecture

Answer»

Correct option is (a) MAR

Best explanation: MAR can interact with SECONDARY storage in order to fetch DATA from it.

34.

To extend the connectivity of the processor bus we use ________(a) PCI bus(b) SCSI bus(c) Controllers(d) Multiple busI got this question in an interview for internship.I need to ask this question from BUS Structure topic in chapter Basic Structures of Computers of Computer Architecture

Answer»

Right OPTION is (a) PCI bus

The best I can EXPLAIN: PCI BUS is used to connect other PERIPHERAL devices that require a direct CONNECTION with the processor.

35.

The Input devices can send information to the processor.(a) When the SIN status flag is set(b) When the data arrives regardless of the SIN flag(c) Neither of the cases(d) Either of the casesThis question was posed to me in an online quiz.This is a very interesting question from Functional Units of a Computer in section Basic Structures of Computers of Computer Architecture

Answer»

Right OPTION is (a) When the SIN status flag is set

The best explanation: The INPUT devices use BUFFERS to STORE the data received and when the buffer has some data it sends it to the processor.

36.

If the instruction, Add R1, R2, R3 is executed in a system that is pipe-lined, then the value of S is (Where S is a term of the Basic performance equation)?(a) 3(b) ~2(c) ~1(d) 6The question was asked in unit test.My query is from Performance of a System in section Basic Structures of Computers of Computer Architecture

Answer»

Right OPTION is (c) ~1

Explanation: S is the number of STEPS REQUIRED to EXECUTE the instructions.

37.

The I/O interface required to connect the I/O device to the bus consists of ______(a) Address decoder and registers(b) Control circuits(c) Address decoder, registers and Control circuits(d) Only Control circuitsThe question was asked in an interview.Enquiry is from Functional Units of a Computer in section Basic Structures of Computers of Computer Architecture

Answer»

The correct ANSWER is (C) ADDRESS decoder, registers and Control circuits

Explanation: The I/O devices are connected to the CPU VIA BUS and to interact with the BUS they have an interface.

38.

SPEC stands for _______(a) Standard Performance Evaluation Code(b) System Processing Enhancing Code(c) System Performance Evaluation Corporation(d) Standard Processing Enhancement CorporationThis question was addressed to me in homework.Asked question is from Performance of a System topic in division Basic Structures of Computers of Computer Architecture

Answer»

Right option is (C) System PERFORMANCE Evaluation Corporation

Easy explanation: SPEC is a corporation that STARTED to STANDARDIZE the evaluation method of a system’s performance.

39.

______ is generally used to increase the apparent size of physical memory.(a) Secondary memory(b) Virtual memory(c) Hard-disk(d) DisksThe question was posed to me in exam.My query is from Functional Units of a Computer topic in chapter Basic Structures of Computers of Computer Architecture

Answer»

Right answer is (B) VIRTUAL memory

Easy EXPLANATION: Virtual memory is like an extension to the EXISTING memory.

40.

The clock rate of the processor can be improved by _________(a) Improving the IC technology of the logic circuits(b) Reducing the amount of processing done in one step(c) By using the overclocking method(d) All of the mentionedThe question was asked in final exam.My doubt stems from Performance of a System topic in chapter Basic Structures of Computers of Computer Architecture

Answer»

Correct answer is (d) All of the mentioned

Easiest EXPLANATION: The clock RATE(FREQUENCY of the processor) is the HARDWARE dependent quantity it is fixed for a given processor.

41.

ISP stands for _________(a) Instruction Set Processor(b) Information Standard Processing(c) Interchange Standard Protocol(d) Interrupt Service ProcedureI have been asked this question in exam.Question is from Basic Operational Concept topic in division Basic Structures of Computers of Computer Architecture

Answer» CORRECT OPTION is (a) INSTRUCTION SET Processor

Explanation: NONE.
42.

______ are numbers and encoded characters, generally used as operands.(a) Input(b) Data(c) Information(d) Stored ValuesThis question was addressed to me in a national level competition.The doubt is from Functional Units of a Computer in section Basic Structures of Computers of Computer Architecture

Answer» CORRECT answer is (B) Data

For EXPLANATION I would say: None.
43.

MFC stands for ___________(a) Memory Format Caches(b) Memory Function Complete(c) Memory Find Command(d) Mass Format CommandThe question was posed to me in my homework.I want to ask this question from Functional Units of a Computer topic in division Basic Structures of Computers of Computer Architecture

Answer»

The correct option is (b) MEMORY FUNCTION Complete

The explanation is: This is a SYSTEM command ENABLED when a memory function is completed by a process.

44.

For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution?(a) ISA(b) ANSA(c) Super-scalar(d) All of the mentionedThis question was posed to me in a job interview.My query is from Performance of a System topic in division Basic Structures of Computers of Computer Architecture

Answer»

Right option is (c) Super-scalar

For EXPLANATION: In super-scalar architecture, the instructions are SET in groups and they’re decoded and EXECUTED TOGETHER reducing the amount of time required to process them.

45.

To reduce the memory access time we generally make use of______(a) Heaps(b) Higher capacity RAM’s(c) SDRAM’s(d) Cache’sI have been asked this question at a job interview.This intriguing question originated from Functional Units of a Computer topic in division Basic Structures of Computers of Computer Architecture

Answer»

Correct answer is (d) Cache’s

The explanation: The TIME REQUIRED to ACCESS a part of the memory for data RETRIEVAL.

46.

A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______(a) Super-scaling(b) Pipe-lining(c) Parallel Computation(d) None of the mentionedThis question was addressed to me in an interview for job.This interesting question is from Performance of a System topic in chapter Basic Structures of Computers of Computer Architecture

Answer»

Correct OPTION is (b) Pipe-lining

Best explanation: Pipe-lining is the process of improving the performance of the system by processing DIFFERENT instructions at the same TIME, with only one INSTRUCTION performing one specific OPERATION.