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101.	Which is the major functioning responsibility of the multiplexing combinational circuit?(a) Decoding the binary information(b) Generation of all minterms in an output function with OR-gate(c) Generation of selected path between multiple sources and a single destination(d) Encoding of binary informationI got this question in examination.Enquiry is from Multiplexers (Data Selectors) topic in division Combinational Circuits of Digital Circuits
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102.	Which combinational circuit is renowned for selecting a single input from multiple inputs & directing the binary information to output line?(a) Data Selector(b) Data distributor(c) Both data selector and data distributor(d) DeMultiplexerThe question was posed to me in an interview for internship.This intriguing question originated from Multiplexers (Data Selectors) in section Combinational Circuits of Digital Circuits
Answer» Right answer is (a) Data SELECTOR The best explanation: Data Selector is another NAME of Multiplexer. A multiplexer (or MUX) is a device that selects one of several analog or digital input signals and FORWARDS the SELECTED input into a single line, depending on the active select lines.

103.	What is a multiplexer?(a) It is a type of decoder which decodes several inputs and gives one output(b) A multiplexer is a device which converts many signals into one(c) It takes one input and results into many output(d) It is a type of encoder which decodes several inputs and gives one outputI got this question by my college director while I was bunking the class.I need to ask this question from Multiplexers (Data Selectors) topic in division Combinational Circuits of Digital Circuits
Answer» The correct choice is (b) A multiplexer is a device which converts many signals into one For explanation: A multiplexer (or MUX) is a device that selects one of SEVERAL analog or digital input signals and FORWARDS the selected input into a single line, depending on the ACTIVE select lines.

104.	3 bits full adder contains ________(a) 3 combinational inputs(b) 4 combinational inputs(c) 6 combinational inputs(d) 8 combinational inputsI have been asked this question by my school teacher while I was bunking the class.Asked question is from Combinational Circuits topic in section Combinational Circuits of Digital Circuits
Answer» Correct choice is (d) 8 combinational inputs The EXPLANATION is: Full Adder is a combinational CIRCUIT with 3 input BITS and 2 output bits CARRY and SUM. Three bits full adder requires 2^3 = 8 combinational CIRCUITS.

105.	The carry propagation can be expressed as ________(a) Cp = AB(b) Cp = A + B(c) All but Y0 are LOW(d) All but Y0 are HIGHThe question was posed to me during an interview.My doubt stems from Combinational Circuits topic in division Combinational Circuits of Digital Circuits
Answer» Right choice is (b) Cp = A + B Best explanation: This happens in parallel adders (where we try to add numbers in parallel via more than ONE adders). A carry propagation occurs when carry from one adder needs to be forwarded to other adder and that second adder is HOLDING the computation (addition) because carry from first adder has not come YET. So, there is a slight DELAY for second adder and this is KNOWN as carry propagation.

106.	For the device shown here, assume the D input is LOW, both S inputs are LOW and the input is LOW. What is the status of the Y’ outputs?(a) All are HIGH(b) All are LOW(c) All but Y0 are LOW(d) All but Y0 are HIGHThe question was asked in quiz.Question is from Combinational Circuits in section Combinational Circuits of Digital Circuits
Answer» The correct answer is (d) All but Y0 are HIGH The best explanation: In the given diagram, S0 and S1 are selection bits. So, I/P S0 S1 O/P D = 0 0 0 Y0 D = 0 0 1 Y1 D = 0 1 0 Y2 D = 0 1 1 Y3 Hence, inputs are S0 and S1 are Low MEANS 0, so output is Y0 and REST all are HIGH.

107.	For a two-input XNOR gate, with the input waveforms as shown below, which output waveform is correct?(a) d(b) a(c) c(d) bI got this question by my college professor while I was bunking the class.My question is based upon Combinational Circuits topic in section Combinational Circuits of Digital Circuits
Answer» Right option is (a) d Best explanation: When both inputs are same then the o/p is HIGH for a XNOR gate. i.e., A B O/P 0 0 1 0 1 0 1 0 0 1 1 1. Thus, it will produce 1 when inputs are even number of 1s or all 0s, and produce 0 when INPUT is odd number of 1s.

108.	Which of the following combinations of logic gates can decode binary 1101?(a) One 4-input AND gate(b) One 4-input AND gate, one inverter(c) One 4-input AND gate, one OR gate(d) One 4-input NAND gate, one inverterThis question was posed to me in an interview.My doubt is from Combinational Circuits topic in section Combinational Circuits of Digital Circuits
Answer» The correct CHOICE is (b) One 4-input AND gate, one inverter For explanation: For DECODING any number output must be high for that code and this is possible in One 4-input NAND gate, one inverter option only. A DECODER is a combinational circuit that converts binary DATA to n-coded data upto 2^n outputs.

109.	What is the indication of a short to ground in the output of a driving gate?(a) Only the output of the defective gate is affected(b) There is a signal loss to all load gates(c) The node may be stuck in either the HIGH or the LOW state(d) The affected node will be stuck in the HIGH stateThis question was addressed to me by my college professor while I was bunking the class.The doubt is from Combinational Circuits in division Combinational Circuits of Digital Circuits
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110.	What type of logic circuit is represented by the figure shown below?(a) XOR(b) XNOR(c) AND(d) XANDI have been asked this question in unit test.My doubt stems from Combinational Circuits in chapter Combinational Circuits of Digital Circuits
Answer» The correct ANSWER is (b) XNOR Explanation: After SOLVING the circuit we get (A’B’)+AB as output, which is XNOR operation. Thus, it will PRODUCE 1 when inputs are even number of 1s or all 0s, and produce 0 when INPUT is odd number of 1s.

111.	The device shown here is most likely a ________(a) Comparator(b) Multiplexer(c) Inverter(d) DemultiplexerI got this question in an interview for internship.I would like to ask this question from Combinational Circuits topic in division Combinational Circuits of Digital Circuits
Answer» Right choice is (d) Demultiplexer Explanation: The given diagram is demultiplexer, because it takes SINGLE INPUT & gives MANY OUTPUTS. A demultiplexer is a combinational circuit that takes a single output and LATCHES it to multiple outputs depending on the select lines.

112.	Which of the following logic expressions represents the logic diagram shown?(a) X=AB’+A’B(b) X=(AB)’+AB(c) X=(AB)’+A’B’(d) X=A’B’+ABThe question was asked during an interview.My question comes from Combinational Circuits in chapter Combinational Circuits of Digital Circuits
Answer» The CORRECT choice is (d) X=A’B’+AB Explanation: 1st output of AND gate is = A’B’ 2ND AND gate’s output is = AB and, OR gate’s output is = (A’B’)+(AB) = AB + A’B’.

113.	Which of the circuits in figure (a to d) is the sum-of-products implementation of figure (e)?(a) a(b) b(c) c(d) dThis question was addressed to me during an interview.My question is from Combinational Circuits in division Combinational Circuits of Digital Circuits
Answer» Right choice is (d) d The best I can explain: SOP means Sum Of PRODUCTS FORM which REPRESENTS the sum of product terms having variables in complemented as well as in uncomplemented form. Here, the diagram of d contains the OR GATE followed by the AND gates, so it is in SOP form.

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