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Right answer is (b) Timing operations, counting operations, sequencing, and frequency division

Easy explanation: There are no integrated CIRCUIT counter chips employed for frequency MULTIPLICATION. In the rest of the options, frequency multiplication is mentioned which is not RELATED to counters in ANYWAY. So, they are not the correct answers.Thus, counters are used for timing operations, counting operations, sequencing and frequency division.

Correct choice is (d) 14 pins

For EXPLANATION: A RIPPLE counter is of 4-bit and has 4 J-K flip-flops. Ripple counter IC has 14 pins.

The correct choice is (c) To set the COUNTER to 1001

For explanation: The set inputs are used in a decade counter to set the counter to 1001 which is 9 in DECIMAL, as a decade counter COUNTS from 0 to 9.

Correct choice is (C) 12 to 1, 11 to 3, 8 to 2

To EXPLAIN: IC-7493 is a MOD-16 counter. So maximum, it can have 16 states. A MOD-12 counter will have 12-states. Thus, it is clear from the diagram shown below: 12 & 1 are clear pins, 11 & 3 are clock pins, 8 & 2 are input for 7493 FF.

Right OPTION is (c) Divide-by-2 & divide-by-8

Explanation: In a 4-bit BINARY RIPPLE COUNTER, FOUR master-slave flip-flops are internally connected to provide a Divide-by-2 & divide-by-8 bit counter.

Right answer is (C) For RESET the counter

The EXPLANATION is: The reset inputs are used to reset the counter to 0000.

Correct ANSWER is (C) 4 master-slave flip-flop

Explanation: IC 7493 consist of 4 J-K master-slave flip-flop. It is a MOD-16 COUNTER with 2^4 = 16 STATES.

Correct answer is (b) 4

The best EXPLANATION: For a n-bit counter, total number of STATES = 2^n. THUS, for 2-bit counter, total number of states = 2^2 = 4.

Right ANSWER is (d) LOW

To ELABORATE: A principle regarding most display decoders is that when the correct input is present, the RELATED OUTPUT will switch LOW. Since it’s an active-low device.

Right CHOICE is (d) 16

Easiest EXPLANATION: In a n-bit counter, the TOTAL number of states = 2^n.

Therefore, in a 4-bit counter, the total number of states = 2^4 = 16 states.

The correct OPTION is (d) 60 ns

To explain I would say: Since a COUNTER is constructed USING flip-flops, therefore, the propagation delay in the counter occurs only due to the flip-flops. ONE BIT change is 15 ns, so 4-bit change = 15 * 4 = 60.

The correct answer is (d) 15

The BEST I can explain: Transitional state is given by (2^n – 1). Since, it’s a 4-bit counter, therefore, transition states = 2^4 – 1 = 15. So, TOTAL transitional states are 15.

Correct choice is (C) 8

To explain: In a n-bit counter, the total number of states = 2^n.

Therefore, in a 3-bit counter, the total number of states = 2^3 = 8 states.

The correct option is (a) 4

For explanation: Number of FLIP-flop required is calculated by this FORMULA: 2^(n-1) <= N< = 2^n. 2^4=16and2^3=8, THEREFORE, 4 flip FLOPS NEEDED.

Correct ANSWER is (b) The output decreases by 1

Easiest EXPLANATION: In an ASYNCHRONOUS counter, there isn’t any CLOCK input. The output of 1^st flip-flop is given to second flip-flop as clock input. So, in case of binary down counter the output WORD decreases by 1.

Correct answer is (d) Synchronous counter

The explanation is: Propagation delay REFERS to the amount of time taken in PRODUCING an output when the input is altered. INTERNAL propagation delay of asynchronous counter is removed by synchronous counter because CLOCK input is given to each flip-flop individually in synchronous counter.

Right answer is (b) High-frequency applications are limited because of INTERNAL propagation delays

To elaborate: One of the major drawbacks to the use of ASYNCHRONOUS counters is that High-frequency applications are limited because of internal propagation delays. Propagation delay refers to the AMOUNT of time taken in PRODUCING an output when the INPUT is altered.

Right choice is (a) Each flip-flop

For explanation I would say: A ripple counter is something that is derived by other flip-flops. It’s LIKE a series of Flip Flops. Output of one FF becomes the INPUT of the next. Because ripple counter is COMPOSED of FF only and no gates are there other than FF, so only propagation delay of FF will be TAKEN into account. Propagation delay refers to the amount of TIME taken in producing an output when the input is altered.

The correct choice is (C) 16

To ELABORATE: In an n-bit counter, the total NUMBER of states = 2^n.

Therefore, in a 4-bit counter, the total number of states = 2^4 = 16 states.

Right ANSWER is (B) Decade counter

Explanation: BCD counter is also KNOWN as decade counter because both have the same NUMBER of stages and both count from 0 to 9.

Correct answer is (B) 3 BCD counters

The explanation: Three DECADE counter has 30 states and a BCD counter has 10 states. So, it would require 3 BCD counters. Thus, a three decade counter will COUNT from 0 to 29.

Correct choice is (c) MSI counters

Best EXPLANATION: Synchronous Counter is a MEDIUM SCALE Integrated (MSI). In Synchronous Counters, the clock PULSE is supplied to all the flip-flops SIMULTANEOUSLY.

The correct choice is (b) STORES the number of times a PARTICULAR EVENT or process has occurred

To elaborate: In digital LOGIC and computing, a counter is a device which stores (and sometimes displays) the number of times a particular event or process has occurred, often in relationship to a CLOCK signal.

The correct choice is (b) Asynchronous COUNTERS

Easy explanation: Ripple counters are also called asynchronous COUNTER. In Asynchronous counters, only the FIRST flip-flop is connected to an EXTERNAL clock while the REST of the flip-flops have their preceding flip-flop output as clock to them.

Right ANSWER is (c) 0 to 2^n – 1

To explain I would say: The maximum possible RANGE of bit-count specifically in n-bit BINARY counter consisting of ‘n’ number of flip-flops is 0 to 2^n-1. For say, there is a 2-bit counter, then it will count till 2^2-1 = 3. THUS, it will count from 0 to 3.

Correct answer is (c) A number of flip-flops CONNECTED in cascade

Easiest explanation: A COUNTER circuit is usually constructed of a number of flip-flops connected in cascade. Preferably, JKFlip-flops are used to CONSTRUCT counters and REGISTERS.