71 + Interview Questions in Interrupts and Exceptions in Embedded Systems Page 2 InterviewSolution

51.	What does ISR stand for?(a) interrupt standard routine(b) interrupt service routine(c) interrupt software routine(d) interrupt synchronous routineI got this question by my college director while I was bunking the class.I'm obligated to ask this question of Introduction of Interrupts in portion Interrupts and Exceptions of Embedded Systems
Answer» The correct OPTION is (b) interrupt service ROUTINE Easy EXPLANATION: The data transfer CODES are WRITTEN as part of the interrupt service routine which is associated with the interrupt generation by the hardware.

Discussion

52.	Which of the following use SWI as interrupt mechanism?(a) PowerPC(b) MC68000(c) Z80(d) IBM PCThis question was posed to me in my homework.I'd like to ask this question from Sources of Interrupts in section Interrupts and Exceptions of Embedded Systems
Answer» Correct option is (c) Z80 The BEST explanation: The PowerPC andMC68000 use TRAP instruction set for ACCESSING software INTERRUPT. IBM PC uses 8086 NMI. Z80 uses SWI for accessing software interrupts.

Discussion

53.	What is programmed to generate a two instruction fast interrupt?(a) software(b) application(c) timer(d) sensorThe question was asked in a national level competition.This interesting question is from Fast Interrupts in chapter Interrupts and Exceptions of Embedded Systems
Answer» Correct choice is (C) timer To explain: The SCI timer generates the two INSTRUCTION fast interrupt. This INCREMENT the register R1.

Discussion

54.	Which of the following is a 16 kbyte block?(a) register(b) vector table(c) buffer(d) lookaside bufferThe question was posed to me during an online exam.This is a very interesting question from RISC Exceptions-II topic in portion Interrupts and Exceptions of Embedded Systems
Answer» CORRECT option is (B) vector table Explanation: The vector table is a 16 kbyte block which is divided into 256 byte divisions in which each division is ALLOCATED for particular exceptions and it also CONTAINS the handler routine ASSOCIATED with the exceptions.

Discussion

55.	Which of the following is used to reduce the external memory cycle?(a) internal hardware stack(b) internal software stack(c) external software stack(d) internal registerThe question was asked during an online exam.This intriguing question comes from The mechanism of Interrupts topic in division Interrupts and Exceptions of Embedded Systems
Answer» Correct choice is (a) INTERNAL hardware stack Explanation: Some of the PROCESSORS use internal hardware stack which HELPS in reducing the external memory CYCLE necessary to STORE the stack frame.

Discussion

56.	Which of the following is the common method for connecting the peripheral to the processor?(a) internal interrupts(b) external interrupts(c) software(d) exceptionI got this question in semester exam.Origin of the question is Sources of Interrupts in section Interrupts and Exceptions of Embedded Systems
Answer» Right option is (b) EXTERNAL INTERRUPTS Best explanation: The COMMON method for connecting the peripheral to the processor is the external interrupts. The external interrupts are provided through the external pins which are connected to the peripherals.

Discussion

57.	Which of the following can be used to create time-driven systems?(a) memory(b) input(c) output(d) interruptsThis question was addressed to me in semester exam.I would like to ask this question from Introduction of Interrupts in division Interrupts and Exceptions of Embedded Systems
Answer» The CORRECT CHOICE is (d) interrupts To explain: The interrupts which are asynchronous can be used with systems that are the EVENT as OPPOSED to the time DRIVEN.

Discussion

58.	Which of the following forces a standard service routine?(a) READY interrupt(b) IRQA interrupt(c) NMI(d) software interruptThis question was addressed to me in quiz.Query is from Fast Interrupts topic in chapter Interrupts and Exceptions of Embedded Systems
Answer» The correct answer is (b) IRQA interrupt Easy explanation: The SCI timer is USED to generate the two instruction fast interrupt which increments the register R1 that acts as a simple counter which times the period between the events. The events itself GENERATES an IRQA interrupt, that FORCES the service ROUTINE.

Discussion

59.	What does MSR stand for?(a) machine state register(b) machine software register(c) minimum state register(d) maximum state registerI got this question in semester exam.My question comes from RISC Exceptions topic in portion Interrupts and Exceptions of Embedded Systems
Answer» The CORRECT answer is (a) machine STATE REGISTER The explanation: The MSR is a machine state register. When the exception is recognised, the address of the INSTRUCTION and the MSR are stored in the supervisor REGISTERS while handling an exception.

Discussion

60.	Which code is written as part of the ISR?(a) data receive code(b) sequential code(c) data transfer code(d) concurrent codeThe question was asked in semester exam.Query is from Introduction of Interrupts in division Interrupts and Exceptions of Embedded Systems
Answer» RIGHT answer is (c) data TRANSFER code The best I can explain: The data transfer CODES are written as part of the interrupt service ROUTINE which is associated with the interrupt GENERATION by the hardware.

Discussion

61.	Which registers are used to determine the completion status?(a) MSR(b) flag register(c) DSISR(d) index registerI have been asked this question in my homework.This interesting question is from RISC Exceptions in portion Interrupts and Exceptions of Embedded Systems
Answer» The correct CHOICE is (c) DSISR For explanation I WOULD SAY: The completion status can be determined by the information bits in the DSISR and FPSCR registers.

Discussion

62.	How many general types of exceptions are there?(a) 2(b) 3(c) 6(d) 4This question was addressed to me in class test.This question is from RISC Exceptions topic in section Interrupts and Exceptions of Embedded Systems
Answer» Right option is (d) 4 To explain: There are FOUR general types of exceptions. They are synchronous PRECISE, ASYNCHRONOUS precise, synchronous imprecise and asynchronous imprecise.

Discussion

63.	Which priority encoder is used in MC68000?(a) 4-to-2 priority encoder(b) LS148 7-to-3(c) 2-to-4 priority encoder(d) LS148 3-to-7The question was asked in examination.My question is taken from The mechanism of Interrupts topic in portion Interrupts and Exceptions of Embedded Systems
Answer» Right choice is (b) LS148 7-to-3 Explanation: The LS148 7-to-3 PRIORITY encoder is used in MC68000. This converts the seven EXTERNAL pins into a three-bit binary CODE.

Discussion

64.	Which interrupt can make a change in the processor’s mode?(a) internal interrupt(b) external interrupts(c) exceptions(d) software modeI had been asked this question in final exam.My enquiry is from Sources of Interrupts topic in section Interrupts and Exceptions of Embedded Systems
Answer» Right option is (c) exceptions Best EXPLANATION: An exception is an event which changes the software flow to PROCESS the event. It includes both internal and external interrupts which cause the PROCESSOR to CHANGE to a service routine.

Discussion

65.	In which of the following method does the code is written in a straight sequence?(a) method 1(b) timing method(c) sequence method(d) spaghetti methodThe question was asked in examination.Query is from Introduction of Interrupts topic in portion Interrupts and Exceptions of Embedded Systems
Answer» The correct ANSWER is (d) SPAGHETTI method Easy explanation: In the spaghetti method, the code is written in a straight sequence in which the ANALYSIS software goes and polls the PORT to see if there is DATA.

Discussion

66.	Which of the following possesses an additional priority?(a) asynchronous precise(b) asynchronous imprecise(c) synchronous precise(d) synchronous impreciseI have been asked this question in final exam.Origin of the question is RISC Exceptions-II in division Interrupts and Exceptions of Embedded Systems
Answer» Correct ANSWER is (C) synchronous precise The BEST I can explain: The synchronous precise EXCEPTIONS provide additional priority because it is possible for an instruction to generate more than ONE exception.

Discussion

67.	How is the internal registers and memories are reset?(a) system reset(b) memory reset(c) peripheral reset(d) software resetThis question was posed to me in a job interview.Query is from RISC Exceptions-II topic in chapter Interrupts and Exceptions of Embedded Systems
Answer» The correct answer is (a) SYSTEM RESET For explanation I would say: By doing the system reset, all the CURRENT PROCESSING are STOPPED and the internal registers and the memories are reset.

Discussion

68.	Which of the following converts the seven external pins into a 3-bit binary code?(a) priority encoder(b) 4-to-2 priority encoder(c) LS148 7-to-3(d) 2-to-4 priority encoderThe question was posed to me in semester exam.This question is from The mechanism of Interrupts topic in chapter Interrupts and Exceptions of Embedded Systems
Answer»

Discussion

69.	Which NMI is used in the IBM PC?(a) SWI(b) TRAP(c) 80×86 NMI(d) Maskable interruptThe question was asked in an interview.Enquiry is from Sources of Interrupts in division Interrupts and Exceptions of Embedded Systems
Answer» Correct answer is (c) 80×86 NMI To EXPLAIN I would say: The most COMMONLY used non-maskable interrupt is the 80×86 NMI, which is IMPLEMENTED in the IBM PC.

Discussion

70.	Which interrupts are generated by the on-chip peripherals?(a) internal(b) external(c) software(d) hardwareThe question was posed to me in an interview for job.I need to ask this question from Sources of Interrupts in chapter Interrupts and Exceptions of Embedded Systems
Answer» The CORRECT choice is (a) INTERNAL To explain: The internal INTERRUPTS are generated by the SERIAL and parallel ports which are on-chip peripherals.

Discussion

71.	Which of the following are asynchronous to the operation?(a) interrupts(b) software(c) DMA(d) memoryI have been asked this question at a job interview.I'd like to ask this question from Introduction of Interrupts in chapter Interrupts and Exceptions of Embedded Systems
Answer» CORRECT choice is (a) interrupts For EXPLANATION: The interrupts are asynchronous to the operation and THEREFORE can be used with systems that are the EVENT as opposed to the time DRIVEN.

Discussion

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Which of the following use SWI as interrupt mechanism?(a) PowerPC(b) MC68000(c) Z80(d) IBM PCThis question was posed to me in my homework.I'd like to ask this question from Sources of Interrupts in section Interrupts and Exceptions of Embedded Systems

What is programmed to generate a two instruction fast interrupt?(a) software(b) application(c) timer(d) sensorThe question was asked in a national level competition.This interesting question is from Fast Interrupts in chapter Interrupts and Exceptions of Embedded Systems

Which of the following is a 16 kbyte block?(a) register(b) vector table(c) buffer(d) lookaside bufferThe question was posed to me during an online exam.This is a very interesting question from RISC Exceptions-II topic in portion Interrupts and Exceptions of Embedded Systems

Which of the following can be used to create time-driven systems?(a) memory(b) input(c) output(d) interruptsThis question was addressed to me in semester exam.I would like to ask this question from Introduction of Interrupts in division Interrupts and Exceptions of Embedded Systems

Which of the following forces a standard service routine?(a) READY interrupt(b) IRQA interrupt(c) NMI(d) software interruptThis question was addressed to me in quiz.Query is from Fast Interrupts topic in chapter Interrupts and Exceptions of Embedded Systems

What does MSR stand for?(a) machine state register(b) machine software register(c) minimum state register(d) maximum state registerI got this question in semester exam.My question comes from RISC Exceptions topic in portion Interrupts and Exceptions of Embedded Systems

Which code is written as part of the ISR?(a) data receive code(b) sequential code(c) data transfer code(d) concurrent codeThe question was asked in semester exam.Query is from Introduction of Interrupts in division Interrupts and Exceptions of Embedded Systems

Which registers are used to determine the completion status?(a) MSR(b) flag register(c) DSISR(d) index registerI have been asked this question in my homework.This interesting question is from RISC Exceptions in portion Interrupts and Exceptions of Embedded Systems

How many general types of exceptions are there?(a) 2(b) 3(c) 6(d) 4This question was addressed to me in class test.This question is from RISC Exceptions topic in section Interrupts and Exceptions of Embedded Systems

Which priority encoder is used in MC68000?(a) 4-to-2 priority encoder(b) LS148 7-to-3(c) 2-to-4 priority encoder(d) LS148 3-to-7The question was asked in examination.My question is taken from The mechanism of Interrupts topic in portion Interrupts and Exceptions of Embedded Systems

Which interrupt can make a change in the processor’s mode?(a) internal interrupt(b) external interrupts(c) exceptions(d) software modeI had been asked this question in final exam.My enquiry is from Sources of Interrupts topic in section Interrupts and Exceptions of Embedded Systems

In which of the following method does the code is written in a straight sequence?(a) method 1(b) timing method(c) sequence method(d) spaghetti methodThe question was asked in examination.Query is from Introduction of Interrupts topic in portion Interrupts and Exceptions of Embedded Systems

How is the internal registers and memories are reset?(a) system reset(b) memory reset(c) peripheral reset(d) software resetThis question was posed to me in a job interview.Query is from RISC Exceptions-II topic in chapter Interrupts and Exceptions of Embedded Systems

Which NMI is used in the IBM PC?(a) SWI(b) TRAP(c) 80×86 NMI(d) Maskable interruptThe question was asked in an interview.Enquiry is from Sources of Interrupts in division Interrupts and Exceptions of Embedded Systems

Which interrupts are generated by the on-chip peripherals?(a) internal(b) external(c) software(d) hardwareThe question was posed to me in an interview for job.I need to ask this question from Sources of Interrupts in chapter Interrupts and Exceptions of Embedded Systems

Which of the following are asynchronous to the operation?(a) interrupts(b) software(c) DMA(d) memoryI have been asked this question at a job interview.I'd like to ask this question from Introduction of Interrupts in chapter Interrupts and Exceptions of Embedded Systems