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A Pipeline system affected by branch instructions is 10 stall cycles. If 30% instruction are branch instructions and pipeline is operating with a clock cycle of 20 ns providing the speed up factor is 40 then, find out the number of stages in the pipeline system? |
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Answer» Thus, pipelined operation INCREASES the efficiency of a system. Design of a basic pipeline In a pipelined processor, a pipeline has two ends, the input end and the output end. Between these ends, there are multiple STAGES/segments such that output of one stage is CONNECTED to input of next stage and each stage performs a specific operation. Interface registers are used to hold the intermediate output between two stages. These interface registers are also called latch or buffer. All the stages in the pipeline along with the interface registers are controlled by a common clock. Execution in a pipelined processor Execution sequence of instructions in a pipelined processor can be visualized using a space-time DIAGRAM. For example, CONSIDER a processor having 4 stages and let there be 2 instructions to be executed. We can visualize the execution sequence through the following space-time diagrams: |
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