Assertion (A) : Maximum power is dessipated in a circuit (through `R`) in resonace Reason (R ) : At resonance in a series `LCR` circuit, the voltage across inductor and capacitor are out phase.A. Both Assertion and Reason are true and Reason is the correct explanation of Assertion.B. Both Assertion and Reason are true but Reason is not the correct explanation of Assertion.C. Assertion is true but Reason is falseD. Assertion is false but Reason is true

Assertion (A) : Maximum power is dessipated in a circuit (through `R`)

1.	Assertion (A) : Maximum power is dessipated in a circuit (through `R`) in resonace Reason (R ) : At resonance in a series `LCR` circuit, the voltage across inductor and capacitor are out phase.A. Both Assertion and Reason are true and Reason is the correct explanation of Assertion.B. Both Assertion and Reason are true but Reason is not the correct explanation of Assertion.C. Assertion is true but Reason is falseD. Assertion is false but Reason is true
Answer» Correct Answer - 1 At resonance `P = I_("max")^(2)` and `V_(L)` and `V_(C )` are out of phase. `I_("max")` is due to `Z_("min") = R` which is due to out of phase of `V_(L)` and `V_(C )`

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