1.

Assertion :- Voltage across L (see figure) at t=0 is E Reason:- Because E=V_(L)+V_(R) and at t=0, i=0

Answer»

If the ASSERTION & REASON are True& the Reason is a CORRECT explanation of the Assertion .
If both Assertion & Reason are True & the Reason is not a correct explanation of the Assertion.
If Assertion is True but the Reason is Fasle.
If both Assertion and Reason are FALSE .

Answer :a


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