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Convert D-ff Into Divide By 2. (not Latch) What Is The Max Clock Frequency The Circuit Can Handle, Given The Following Information? |
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Answer» T_setup= 6nsT_hold = 2NS T_propagation = 10nS Circuit: Connect Qbar to D and apply the clk at clk of DFF and take the O/P at Q. It gives FREQ/2. Max. Freq of operation: 1/ (propagation delay+setup time) = 1/16ns = 62.5 MHZ T_setup= 6nsT_hold = 2nS T_propagation = 10nS Circuit: Connect Qbar to D and apply the clk at clk of DFF and take the O/P at Q. It gives freq/2. Max. Freq of operation: 1/ (propagation delay+setup time) = 1/16ns = 62.5 MHz |
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