In the following C.S. stage shown below, what is the voltage gain from the gate to the drain of M1 if λ>0?(a) gm * ro(b) gm * 2R1(c) gm * R1||ro(d) gm * R1I got this question by my college professor while I was bunking the class.I'm obligated to ask this question of MOSFET Amplifier with CS Configuration in chapter FET Amplifiers of Analog Circuits

In the following C.S. stage shown below, what is the voltage gain from

1.	In the following C.S. stage shown below, what is the voltage gain from the gate to the drain of M1 if λ>0?(a) gm * ro(b) gm * 2R1(c) gm * R1\|\|ro(d) gm * R1I got this question by my college professor while I was bunking the class.I'm obligated to ask this question of MOSFET Amplifier with CS Configuration in chapter FET Amplifiers of Analog Circuits
Answer» The CORRECT answer is (c) gm * R1\|\|ro Explanation: This is easily observable by performing a small signal analysis at the output of the C.S. stage. We need to turn off all voltage SOURCES, Vcc mainly, and GIVE a small INPUT at the GATE. Thereby, the voltage gain becomes gm * R1\|\|ro. The presence of early effect reduces the gain a bit and deviates M1 from its ideal characteristics.

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