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What Is The Difference Between Synchronous And Asynchronous Reset?

Answer»
  • Synchronous reset is the logic that will synthesize to smaller flip-flops. In this the CLOCK works as a filter providing the small reset glitches but the glitches occur on the active clock edge, whereas the ASYNCHRONOUS reset is ALSO known as reset release or reset removal. The designer is responsible of added the reset to the data paths.
  • The synchronous reset is used for all the types of design that are used to filter the logic glitches provided between the clocks. Whereas, the CIRCUIT can be reset with or without the clock present.
  • Synchronous reset doesn't allow the synthesis tool to be used easily and it distinguishes the reset signal from other data signal. The release of the reset can occur only when the clock is having its initial period. If the release happens near the clock edge then the flip-flops can be METASTABLE.



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