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• There are in TOTAL 6 single-bit INSTRUCTIONS.
• CPL bit: complement the bit (bit= NOT bit).
• JB bit, TARGET: Jump to target if bit EQUAL to 1.
• JNB bit, target: Jump to target if bit is equal to 0.
• JCB bit, target: Jump to target if bit is equal to 1 and then clear bit.

• Yes, 8051 has the CAPABILITY of accessing only single BIT of a PORT.
• Here only single bit is accessed and rest is unaltered.
• SYNTAX: “SETB X. Y”.
• Here X is the port NUMBER and y is the desired bit.
• Example: SETB P1.2

 Here the second bit of port 1 is set to 1.

 Here the second bit of port 1 is set to 1.

• Port0 and port2 together form the 16 bit address for external memory.
• Port0 uses pins 32 to 39 of 8051 to give the LOWER address bits(AD0-AD7)
• Port2 uses pins 21 to 28 of 8051 to give the higher address bits(A8-A15)
• This 16 bit address is USED to ACCESS external memory if attached.
• When connected to external memory they cannot be used as INPUT output ports.

Yes, port 0 can be USED as input output port. Port 0 is an open drain unlike ports 2, 3, 4. To USE it as input or output the 10K OHM pull-up resisters are connected to it externally. To make port 0 as input port it must be programmed by writing 1 to all bits.

Example:

1. MOV A,#0FFH
2. MOV P0,A

Yes, port 0 can be used as input output port. Port 0 is an open drain unlike ports 2, 3, 4. To use it as input or output the 10k ohm pull-up resisters are connected to it externally. To make port 0 as input port it must be programmed by writing 1 to all bits.

Example:

It is a command used to jump if no carry occurs after an ARITHMETIC operation. It is CALLED as jump if no carry (conditional jump instruction). Here the carry FLAG bit in PSW register is used to MAKE decision. The PROCESSOR looks at the carry flag to see if it is raised or not.
If carry flag is 0, CPU fetches instructions from the address of the label.

It is a command used to jump if no carry occurs after an arithmetic operation. It is called as jump if no carry (conditional jump instruction). Here the carry flag bit in PSW register is used to make decision. The processor looks at the carry flag to see if it is raised or not.
If carry flag is 0, CPU fetches instructions from the address of the label.

• BANK 1 uses the same RAM space as the stack.
• Stack pointer is incremented or decremented according to the push or pop instruction.
• If the stack pointer is decremented it uses locations 7, 6, 5… which belong to register bank 0.
• If a GIVEN program uses R1 then stack is provided new memory location.
• The push instruction may also take stack to location 0 i.e.it will run out of space.

The 2nd bit of the flag register is set when output flows to the SIGN bit. This flag is also called as the overflow flag. Here the output of the signed number operation is too large to be ACCOMMODATED in 7 bits. For signed numbers the MSB is used to INDICATE the WHETHER the number is positive or negative. It is only used to detect errors in signed number operations.

The 2nd bit of the flag register is set when output flows to the sign bit. This flag is also called as the overflow flag. Here the output of the signed number operation is too large to be accommodated in 7 bits. For signed numbers the MSB is used to indicate the whether the number is positive or negative. It is only used to detect errors in signed number operations.

• The flag register also called as the program status word uses only 6 bits.
• The two UNUSED bits are user definable flags.
• CARRY, auxiliary carry, PARITY and OVERFLOW flags are the conditional flags used in it.
• 1 is a user definable bit and PSW.5 can be used as general purpose bit.
• Rest all flags indicate some or the other condition of an ARITHMETIC operation.

• Label name should be unique and must contain alphabetic letters in both UPPERCASE and lowercase.
• 1st letter should always be an alphabetic letter.
• It can also USE digits and SPECIAL characters?,.,@,_,$.
• Label should not be one of the RESERVED words in assembly LANGUAGE.
• These labels make the program much easier to read and maintain.

• EQU is the EQUATE ASSEMBLER DIRECTIVE used to define a constant without OCCUPYING a MEMORY location.
• It associates a constant value with data label.
• Whenever the label appears in the program, constant value is substituted for label.
• Advantage: The constant value occurring at various positions in a program can be changed at once using this directive.
• Syntax: label EQU constant value

• DB is CALLED as define byte USED as a directive in the assembler.
• It is used to define the 8 bit data in binary, HEXADECIMAL or DECIMAL formats.
• It is the only directive that can be used to define ASCII strings larger than two CHARACTERS.
• DB is also used to allocate memory in byte sized chunks.
• The assembler always converts the numbers into hexadecimal.

• This FILE is also called as list file.
• It LISTS the opcodes, addresses and errors detected by the assembler.
• List file is produced only when indicated by the user.
• It can be accessed by an editor and displayed on MONITOR screen or printed.

Programmer USES this file to find the syntax errors and LATER fix them.

Programmer uses this file to find the syntax errors and later fix them.

The BIT addressable MEMORY in 8051 is compose from 210 bits: bit address space: 20H – 2FH bytes RAM = 00H – 7FH bits address, SFR registers.

The bit addressable memory in 8051 is compose from 210 bits: bit address space: 20H – 2FH bytes RAM = 00H – 7FH bits address, SFR registers.

• Internal RAM
• Special FUNCTION registers
• Program memory
• EXTERNAL DATA memory

• External INTERRUPT 0 (IE0) has highest PRIORITY AMONG interrupts.
• Timer interrupt 0 (TF0)
• External interrupt 1 (IE1)
• Timer interrupt 1 (TF1) has lowest priority among other interrupts.
• SERIAL port Interrupt
• Reset.

EXAMPLE: bit address 87h –> BYTE address 80H, bit #7

Example: bit address 87h –> byte address 80h, bit #7

The MEMORY ADDRESSES from 80H to 0FFH are called SFR. These are 128 BYTES registers specially designed for interrupts and few other operations.

The memory addresses from 80H to 0FFH are called SFR. These are 128 bytes registers specially designed for interrupts and few other operations.

64K DATA MEMORY

64K data memory

• Direct Addressing
• REGISTER Addressing
• Register Indirect Addressing
• IMPLICIT Addressing
• Immediate Addressing
• Index Addressing

128 BYTES of RAM (from 0x00 to 0X7F) and can be used to store DATA.

128 bytes of RAM (from 0x00 to 0x7F) and can be used to store data.

At LOCATION 0X00 for INTERNAL or EXTERNAL MEMORY

At location 0x00 for internal or external memory

• 40 Pin IC.
• 128 BYTES of RAM.
• 4K ROM.
• 2 Timers (Timer 0 and Timer 1).
• 32 Input/ Output PINS.
• 1 serial port.
• 6 INTERRUPTS (Including RESET). 

16-bit ADDRESS BUS

16-bit address bus

8-bit DATA BUS

8-bit data bus

The INTEL 8051 is an 8-bit microcontroller which MEANS that most available operations are limited to 8 bits.

The Intel 8051 is an 8-bit microcontroller which means that most available operations are limited to 8 bits.

INTEL’s original MCS-51 family was developed using NMOS TECHNOLOGY, but later versions, identified by a LETTER C in their name (e.g., 80C51) used CMOS technology and consume less power than their NMOS PREDECESSORS. This made them more SUITABLE for battery-powered devices.

Intel’s original MCS-51 family was developed using NMOS technology, but later versions, identified by a letter C in their name (e.g., 80C51) used CMOS technology and consume less power than their NMOS predecessors. This made them more suitable for battery-powered devices.

The name HARVARD Architecture comes from the Harvard Mark. The most obvious characteristic of the Harvard Architecture is that it has PHYSICALLY separate signals and storage for code and data memory. It is possible to access program memory and data memory simultaneously. Typically, code (or program) memory is read-only and data memory is read-write. Therefore, it is impossible for program contents to be modified by the program itself.

The von NEUMANN Architecture is named after the mathematician and early computer scientist John von Neumann. Von Neumann machines have SHARED signals and memory for code and data. Thus, the program can be easily modified by itself since it is STORED in read-write memory.

The name Harvard Architecture comes from the Harvard Mark. The most obvious characteristic of the Harvard Architecture is that it has physically separate signals and storage for code and data memory. It is possible to access program memory and data memory simultaneously. Typically, code (or program) memory is read-only and data memory is read-write. Therefore, it is impossible for program contents to be modified by the program itself.

The von Neumann Architecture is named after the mathematician and early computer scientist John von Neumann. Von Neumann machines have shared signals and memory for code and data. Thus, the program can be easily modified by itself since it is stored in read-write memory.

INTEL 8051 is HARVARD ARCHITECTURE.

Intel 8051 is Harvard Architecture.

In 1981, Intel Corporation introduced an 8-bit microcontroller called the 8051. The 8051 became widely popular after Intel allowed other MANUFACTURERS to make and market any flavors of the 8051. They please with the condition that they remain code-compatible with the 8051. This has led to many, versions of the 8051 with DIFFERENT speeds and amounts of on-chip ROM marketed by more than half a DOZEN manufacturers. It is important to note that although there are different flavors of the 8051 in terms of speed and amount of on-chip ROM, they are all compatible with the original 8051 as far as the instructions are concerned. This means that if you write your PROGRAM for one, it will RUN on any of them regardless of the manufacturer.

In 1981, Intel Corporation introduced an 8-bit microcontroller called the 8051. The 8051 became widely popular after Intel allowed other manufacturers to make and market any flavors of the 8051. They please with the condition that they remain code-compatible with the 8051. This has led to many, versions of the 8051 with different speeds and amounts of on-chip ROM marketed by more than half a dozen manufacturers. It is important to note that although there are different flavors of the 8051 in terms of speed and amount of on-chip ROM, they are all compatible with the original 8051 as far as the instructions are concerned. This means that if you write your program for one, it will run on any of them regardless of the manufacturer.