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This section includes InterviewSolutions, each offering curated multiple-choice questions to sharpen your knowledge and support exam preparation. Choose a topic below to get started.

101.

Which of the following is necessary for the parallel input-output port?(a) inductor(b) pull-up resistor(c) push-up resistor(d) capacitorThis question was addressed to me in an online quiz.This key question is from Parallel Ports in portion Basic Peripherals of Embedded Systems

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Right answer is (b) pull-up RESISTOR

To elaborate: The I/O PORT needs an external pull-up resistor. In some devices, it offers INTERNALLY. If it is not provided, it can cause INCORRECT data on reading the port and it prevents the port from turning off an external DEVICE.

102.

Which of the following registers offers high impedance?(a) data register(b) data direction register(c) individual control bit(d) data register and data direction registerThis question was posed to me in an interview for job.Origin of the question is Parallel Ports in portion Basic Peripherals of Embedded Systems

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Right answer is (c) individual control bit

The best explanation: The register which offers HIGH impedance is the individual control bit or the THIRD register which can be implemented by switching off both the BUFFERS and PUTTING their connections to the PIN which offers high impedance.

103.

Which is used to prioritise multiple requests?(a) dual address mode(b) single address mode(c) arbitration(d) chainingThis question was addressed to me in an interview for internship.My doubt stems from DMA-II in section Basic Peripherals of Embedded Systems

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Correct OPTION is (C) arbitration

To EXPLAIN: The arbitration is used to PROVIDE priority for multiple access. This uses a priority scheme which may offer fair priority to the one channel, or a high priority to the other channel and so on. Such condition is OTHERWISE known as round-robin condition in which the priority is equally divided.

104.

How is the count register can be splitted?(a) 2(b) 3(c) 4(d) 5I got this question in final exam.This question is from DMA-II topic in portion Basic Peripherals of Embedded Systems

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Correct choice is (a) 2

Easy explanation: In the 2D MODEL of the DMA controller, in ADDITION to the address stride there is a count register which can be split into two, in which ONE register is used to specify the count for the block and the second register is used to define the TOTAL number of blocks or the bytes to be TRANSFERRED.

105.

Which of the following connections are one to one?(a) Modem cables(b) SPI(c) UART(d) I2CThe question was asked by my college professor while I was bunking the class.Question is from Asynchronous Flow Control in portion Basic Peripherals of Embedded Systems

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Right option is (a) Modem cables

To EXPLAIN I WOULD say: The modem cables are STRAIGHT cables which allow one to one connections WITHOUT crossover.

106.

Which of the following has a quadruple buffered receiver and a double buffered transmitter?(a) Intel 8250(b) 16450(c) 16550(d) MC68681I got this question during an online exam.My question is from UART-2 topic in section Basic Peripherals of Embedded Systems

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Correct option is (d) MC68681

The best explanation: The MC68681 is a STANDARD UART DEVELOPED by MOTOROLA. It possess a quadruple buffered RECEIVER and a double buffered transmitter.

107.

Which of the following have large FIFO buffer?(a) 8253(b) 8250(c) 16550(d) 16450I got this question in an interview for job.This intriguing question originated from UART-2 topic in section Basic Peripherals of Embedded Systems

Answer» CORRECT choice is (c) 16550

Easiest explanation: The LARGEST buffer of 16 bytes is available on 16550 UART which is used for high speed data COMMUNICATIONS.
108.

Which of the following signals are active low in the 8250 UART?(a) BAUDOUT(b) DDIS(c) INTR(d) MRThe question was asked in quiz.I would like to ask this question from UART in section Basic Peripherals of Embedded Systems

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Correct option is (a) BAUDOUT

Easy EXPLANATION: The BAUDOUT signal is active low whereas DDIS, INTR and MR are active high in the 8250 UART. BAUDOUT is the clock signal from the transmitter part of the UART. DDIS signal goes low when the CPU is reading data from the UART. INTR is the INTERRUPT pin. MR is the MASTER reset pin.

109.

How is data detected in a UART?(a) counter(b) timer(c) clock(d) first bitI have been asked this question in a national level competition.My enquiry is from UART in chapter Basic Peripherals of Embedded Systems

Answer» CORRECT option is (C) clock

The explanation: The DATA can be detected by the local clock reference which is generated from the baud RATE GENERATOR.
110.

Which are the serial ports of the IBM PC?(a) COM1(b) COM4 and COM1(c) COM1 and COM2(d) COM3The question was asked in an online quiz.Question is taken from RS232 topic in division Basic Peripherals of Embedded Systems

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Right option is (c) COM1 and COM2

Explanation: The IBM PC has one or two serial PORTS called the COM1 and the COM2, which are USED for the DATA transmission between the PC and many other peripheral units LIKE a printer, MODEM etc.

111.

Which of the following are handshake signals?(a) START(b) STOP(c) ACKNOWLEDGE(d) START and STOPThe question was asked in an interview for job.Origin of the question is I2C-I in chapter Basic Peripherals of Embedded Systems

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Right ANSWER is (c) ACKNOWLEDGE

Explanation: The START SIGNAL and ACKNOWLEDGE signals are almost similar but there exhibits a small CHANGE. The START signal is INITIATED by the master only but the ACKNOWLEDGE signal is a handshake between both the master and slave.

112.

How many bit architecture does MC68230 have?(a) 16(b) 24(c) 32(d) 40This question was addressed to me by my school teacher while I was bunking the class.The doubt is from Timer-II topic in section Basic Peripherals of Embedded Systems

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Right ANSWER is (b) 24

The best EXPLANATION: The MC68230 TIMER have a 24-bit architecture which is split into THREE 8-bit components because of the 8-bit bus in the MC68000 CPU.

113.

Which bit size determines the maximum value of the counter-derived period?(a) counter size(b) pre-scalar value(c) bit size(d) byte sizeThis question was posed to me in class test.Origin of the question is Timer in portion Basic Peripherals of Embedded Systems

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Correct answer is (a) counter size

To elaborate: The bit size are basically DETERMINED by its fundamental properties, that is, the pre-scalar VALUE and the counter size. The counter size DETERMINES the MAXIMUM value of the counter derived period.

114.

Which of the following can be adopted for the systems which does not contain DMA controller for data transmission?(a) counter(b) timer(c) polling(d) memoryI have been asked this question by my college professor while I was bunking the class.My enquiry is from DMA in portion Basic Peripherals of Embedded Systems

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Correct answer is (C) POLLING

Explanation: The polling and INTERRUPT helps for data transmission for the systems which do not have DMA CONTROLLER.

115.

Which of the following is a general purpose I/O pin?(a) OUT1(b) RD(c) ADS(d) MRI have been asked this question in exam.The query is from UART-2 topic in chapter Basic Peripherals of Embedded Systems

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Right ANSWER is (a) OUT1

Easy explanation: There are TWO general purposes I/O pin OUT1 and OUT2. OUT1 is set by the programming bit 2 of the MCR to a ‘1’ WHEREAS OUT2 is set by the programming bit 3 of the MCR to ‘1’. These are active low pins in 8250.

116.

Which provides an input clock for the receiver part of the UART 8250?(a) RD(b) RCLK(c) MR(d) DDISI had been asked this question in my homework.This question is from UART-2 in division Basic Peripherals of Embedded Systems

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Right OPTION is (b) RCLK

Best explanation: RCLK provides an INPUT CLOCK for the receiver part of the UART. RD is the read signal. MR is the master reset pin and DDIS is USED to control bus arbitration logic.

117.

Which company developed 16450?(a) Philips(b) Intel(c) National semiconductor(d) IBMI got this question by my school principal while I was bunking the class.Question is from UART topic in portion Basic Peripherals of Embedded Systems

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Right OPTION is (c) National semiconductor

To explain I would say: The Intel 8250 is replaced by the 16450 and 16550 which are DEVELOPED by the National SEMICONDUCTORS. 16450 is a chip which can combine all the PC’s input output devices into a SINGLE piece of silicon.

118.

What rate can define the timing in the UART?(a) bit rate(b) baud rate(c) speed rate(d) voltage rateThis question was addressed to me by my college professor while I was bunking the class.Asked question is from UART topic in portion Basic Peripherals of Embedded Systems

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Right CHOICE is (b) baud rate

The best explanation: The timing is defined by the baud rate in which both the transmitter and receiver are used. The baud rate is supplied by the counter or an EXTERNAL TIMER called baud rate generator which generates a CLOCK signal.

119.

Which of the following can determine if two masters start to use the bus at the same time?(a) counter detect(b) collision detect(c) combined format(d) auto-incremental counterThe question was posed to me in class test.Query is from I2C-II topic in chapter Basic Peripherals of Embedded Systems

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The correct CHOICE is (b) collision detect

Best explanation: The collision DETECTS technique HELPS to determine whether TWO or more masters are USING the same bus in a multi-master device.

120.

How much time period is necessary for the slave to receive the interrupt and transfer the data?(a) 4 clock time period(b) 8 clock time period(c) 16 clock time period(d) 24 clock time periodThis question was posed to me in a job interview.This question is from Serial Port and Serial Peripheral Interface in portion Basic Peripherals of Embedded Systems

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The correct option is (b) 8 clock time period

For EXPLANATION: The SPI uses an EIGHT clock time period for the slave to receive the interrupt and TRANSFER the data which determines the maximum data rate.

121.

What happens when 8 bits are transferred in the SPI?(a) wait statement(b) ready statement(c) interrupt(d) remains unchangedThis question was addressed to me by my college director while I was bunking the class.I'm obligated to ask this question of Serial Port and Serial Peripheral Interface topic in section Basic Peripherals of Embedded Systems

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122.

How many bit bus does MC68230 have?(a) 2(b) 4(c) 8(d) 16This question was addressed to me during an online exam.This interesting question is from Timer-II in division Basic Peripherals of Embedded Systems

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Correct answer is (c) 8

To EXPLAIN: The MC68230 timer have a 24-bit architecture which is split into three 8-bit components because of the 8-bit bus which is used for the communication with the host processor LIKE MC68000 CPU which have an 8-bit architecture.

123.

What does ADS indicate in 8250 UART?(a) address signal(b) address terminal signal(c) address strobe signal(d) address generating signalThe question was asked during an interview for a job.Enquiry is from UART in section Basic Peripherals of Embedded Systems

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The correct answer is (C) address STROBE signal

The best I can explain: The ADS is address strobe signal and is working as active low in 8250 UART. The ADS signal is used to latch the address and chip select signals while PROCESSOR access.

124.

Which of the signal is set to one, if no data is transmitted?(a) READY(b) START(c) STOP(d) TXDThis question was posed to me during an interview for a job.My question is taken from UART topic in section Basic Peripherals of Embedded Systems

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Right choice is (d) TXD

The explanation is: The TXD SIGNAL goes to logic ONE when no data is transmitted. When data TRANSMIT, it sets to logic ZERO.

125.

Which of the following can provide hardware handshaking?(a) RS232(b) Parallel port(c) Counter(d) TimerThis question was addressed to me during an online exam.My question is based upon RS232 topic in chapter Basic Peripherals of Embedded Systems

Answer» CORRECT choice is (a) RS232

The explanation: In RS232, several lines are USED for TRANSMITTING and receiving data and these also provide CONTROL for the hardware handshaking.
126.

Which signal allows the DMA controller to select the peripheral?(a) local peripheral control(b) global peripheral control(c) address bus(d) data busI got this question during an interview.Question is taken from DMA in chapter Basic Peripherals of Embedded Systems

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The correct choice is (a) local PERIPHERAL control

The BEST I can explain: The local peripheral control allows the DMA controller to select the peripheral.

127.

Which of the following uses two data transfers?(a) auto-incrementing counter(b) auto-decrementing counter(c) combined format(d) single formatI had been asked this question in a job interview.The query is from I2C-II in section Basic Peripherals of Embedded Systems

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128.

Which of the following are the three hardware signals?(a) START, STOP, ACKNOWLEDGE(b) STOP, TERMINATE, END(c) START, SCL, SDA(d) STOP, SCL, SDAThe question was posed to me in an interview.The above asked question is from I2C-I in division Basic Peripherals of Embedded Systems

Answer» CORRECT choice is (a) START, STOP, ACKNOWLEDGE

The BEST I can explain: The three hardware signals are START, STOP and ACKNOWLEDGE. These signals help in the TRANSMISSION of data between the SLAVE and the masters.
129.

Which of the following is also known as tri-state?(a) output port(b) input port(c) parallel port(d) output-input portThe question was asked by my college professor while I was bunking the class.Question is taken from Parallel Ports topic in section Basic Peripherals of Embedded Systems

Answer» CORRECT option is (a) output port

The explanation: The progression in the parallel ports PROVIDES a third register or an individual CONTROL bit which can make the pin in a high impedance state. An output port which can do this is ALSO KNOWN as tri-state, that is, logic high, logic low and a high impedance state.
130.

Which of the following is the mode 3 in the Intel timer 8253?(a) rate generator(b) hardware triggered strobe(c) square wave rate generator(d) software triggered strobeThe question was posed to me in an online interview.My enquiry is from Timer in portion Basic Peripherals of Embedded Systems

Answer» CORRECT choice is (a) rate generator

The EXPLANATION is: The rate generator is the MODE 3 in Intel 8253 timer.The square wave generator is the mode 4 and the hardware triggered strobe is the mode 5 in the Intel 8253 timer.