InterviewSolution
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InterviewSolution
This section includes InterviewSolutions, each offering curated multiple-choice questions to sharpen your knowledge and support exam preparation. Choose a topic below to get started.
| 51. |
A 4 bit ripple counter starts in 0000 state. When the counter reads 0010 the number of clock pulses which have occurred is |
| Answer» At pulse 1 the state changes to 0001 and at pulse 2 it changes to 0010 Since it has a total of 16 states, the counter returns to 0000 after 16 and 32 pulses. | |
| 52. |
The number FF in hexadecimal system is equivalent to number __________ in decimal system. |
| Answer» FF = 15 x 16 + 15 = 255. | |
| 53. |
The inputs A, B, C of the given figure are applied to a 3 input NOR gate. The output is |
| Answer» NOR gate gives high output if all inputs are Low. For all other combinations of inputs, output is Low. | |
| 54. |
A 4 bit down counter starts counting from 1111 irrespective of modulus. |
| Answer» The starting count depends on modulus. 4 bit decade down counter starts counting from 1010. | |
| 55. |
What will be conversion time of a successive approximation A/D converter which uses 2 MHz clock and 5 bit binary ladder containing 8 V reference.? |
| Answer» . | |
| 56. |
The number of counter states which an 8 bit stair step A/D converter has to pass through before conversion takes place is equal to |
| Answer» 28 = 256. | |
| 57. |
A DAC has full scale output of 5 V. If accuracy is ± 0.2% the maximum error for an output of 1 V is |
| Answer» Maximum error = = 10 mV. | |
| 58. |
Binary number 1101101101 is equal to decimal number |
| Answer» 2048 + 1024 + 128 + 64 + 16 + 8 + 1 = 3289 in decimal. | |
| 59. |
A 16:1 multiplexer has 4 select input lines. |
| Answer» 24 = 16. | |
| 60. |
74 HC series can sink upto 4 mA. The 74 LS series has I - 0.4 mA. How many 74 LS inputs be driven by 74 HC output? |
| Answer» . | |
| 61. |
For the ring oscillator shown in the figure, the propagation delay of each inverter is 100 pico sec. What is the fundamental frequency of the oscillator output __________ |
| Answer» T = 500 x 10-12 = 5 x 10-10 = . | |
| 62. |
If A is 1011, A" is |
| Answer» Taking 2's complement twice gives the original number. | |
| 63. |
FF when converted to 8421BCD = |
| Answer» FF in hexadecimal = 15 x 16 + 15 = 255 in decimal = 0010 0101 0101 in BCD. | |
| 64. |
ECL has high switching speed because the transistors are |
| Answer» High speed is obtained because saturation state is avoided. | |
| 65. |
Karnaugh map can not be drawn when the number of variables is more than 4 |
| Answer» K map can be drawn for more than 4 variables. | |
| 66. |
A dynamic RAM cell which holds 5 V has to be refreshed every 20 ms so that the stored voltage does not fall by more than 0.5 V. If the cell has a constant discharge current of 0.1 pA, the storage capacitance of cell is |
| Answer» Q = 20 x 10-3 x 0.1 x 10-12 = 2 x 10-15 C and . | |
| 67. |
The number of flip flops needed for a Mod 7 counter are |
| Answer» 23 = 8 If 3 flip-flops are used the modulus can be a maximum of 8. | |
| 68. |
For AB + C + BC = AB + C the dual form is |
| Answer» Change OR to AND and vice versa. | |
| 69. |
In which counter does the maximum frequency depend on the modulus? |
| Answer» Since propagation delays of all flip-flops are added in ripple counter, the maximum frequency depends on the number of flip-flops which depends on modulus. | |
| 70. |
A current tracer responds to |
| Answer» The indicator of current tracer glows when its tip is held over a pulsating current path. | |
| 71. |
A presettable counter with 4 flip flops can start counting from |
| Answer» Since 4 flip-flops are used it can count from 0000 to 1111. By presetting it can start from any number. | |
| 72. |
A logical expression Y = A + B is equal to |
| Answer» Y = A + A B = (A + A) (A + B) = (A + B). | |
| 73. |
Using the same flip flops |
| Answer» In a synchronous counter clock pulses are applied to all flip-flops simultaneously. Hence minimum time delay and high frequency. | |
| 74. |
The value of 2 in octal system is |
| Answer» 25 in decimal = 32 (32)10 = (100000)2= . | |
| 75. |
The modulus of counter in the given figure is |
| Answer» Third clock pulse resets the counter to 00 state. Hence mod is 3. | |
| 76. |
The input to a parity detector is 1001. The output is |
| Answer» Since the number of 1 's is even, output is 0. | |
| 77. |
Binary number 11001 is equivalent to decimal number |
| Answer» 11001 = 16 + 8 + 1 = 25 in decimal. | |
| 78. |
A 4 bit modulo 16 ripple counter uses JK flip-flops. If the propagation delay of each FF is 50 ns. The max. clock frequency that can be used is equal to |
| Answer» Propagation Delay for one FF is 50 nsec. For 4 FF = 50 x 4 = 200 nsec.. | |
| 79. |
As the number of flip flops are increased, the total propagation delay of |
| Answer» In ripple counter the clock pulses are applied to one flip- flop only. Hence as the number of flip-flops increases the delay increases. In synchronous counter clock pulses to all flip-flops are applied simultaneously. | |
| 80. |
In a 4 input OR gate, the total number of High outputs for the 16 input states are |
| Answer» OR gate gives high output when one or more inputs are high. | |
| 81. |
What will be the maximum conversion time in 6 bit dual slope A/D converter uses a reference of -6v and a 1 MHz clock. It uses a fixed count of 40 (101000). |
| Answer» for t2 maximum all bits should be 111111 = (63)10 Maximum conversion time = 63 + 40 = 103 μ sec and it takes 5 μ sec to transfer N2 to the O/P register. tcmax = 108 μ sec. | |
| 82. |
Find the FSV (full scale voltage) in a 6 bit R-2 ladder D/A converter has a reference voltage of 6.5 V. |
| Answer» . | |
| 83. |
Parallel adder is |
| Answer» Adder is a combinational circuit. | |
| 84. |
A 10 bit ADC with a full scale output voltage of 10.24 V is to be designed to have ± LSB/2 accuracy. If ADC is calibrated at 25°C, the maximum net temperature coefficient of ADC should not exceed |
| Answer» , accuracy = 5 mV, temp, . | |
| 85. |
If all the LEDs in a seven segment display are turned on, the number displayed is |
| Answer» | |
| 86. |
In a three input AND gate A = 1, B = 1, C = 0 The output Y = |
| Answer» Since C = 0 we get C Therefore Y = A B C . | |
| 87. |
DeMorgan's first theorem shows the equivalence of |
| Answer» First theorem A + B = A . B. | |
| 88. |
0.1011 = __________ . |
| Answer» 0.5 + 0 + 0.125 + 0.0625 = 0.6875. | |
| 89. |
An 8 bit binary number is to be entered into an 8 bit serial shift register. The number of clock pulses required is |
| Answer» In serial shift register one pulse is needed to store each bit. | |
| 90. |
In the given figure, A = B = 1 and C = D = 0. Then Y = |
| Answer» The CD inputs when fed to NOR gate give output 1. Therefore Y = 1.1.1 = 0. | |
| 91. |
The number of switching functions of 3 variables are |
| Answer» 23 = 8. | |
| 92. |
The applications of shift registers are Which of the above are correct? |
| Answer» Shift registers are used for all these applications. | |
| 93. |
The function Y = AC + BD + EF is |
| Answer» It is sum of products. | |
| 94. |
If memory chip size is 256 x 1 bits, the number of chips required to make 1 k byte memory is |
| Answer» (1024 x 8)/(256 x 1 ) = 32. | |
| 95. |
Computers use RC circuit for edge triggering. |
| Answer» No, gates are used for edge triggering. | |
| 96. |
An 8 bit transistor register has output voltage of low-high-low-high-low-high-low-high. The decimal number stored is |
| Answer» 01010101 in binary and 64 + 16 + 4 + 1 = 85 in decimal. | |
| 97. |
The number of cells in a 4 variable K map is |
| Answer» 24 = 16. | |
| 98. |
An AND gate has four inputs. One of the inputs is low and other inputs are high. The output |
| Answer» In AND gate all inputs must be high to give high output. | |
| 99. |
In the given figure, the flip flop is |
| Answer» The small circle indicates negative and small triangle indicates edge triggering. | |
| 100. |
In a 4 bit ripple counter using flip flops with = 40 ns, the maximum frequency can be |
| Answer» Total time delay = 40 x 4 = 160 x 100-9s. Hence . | |