88 + Interview Questions in Processor Families in Computer Architecture Page 2 InterviewSolution

51.	The starting address is denoted using _________ directive.(a) EQU(b) ORIGIN(c) ORG(d) PLACEI got this question by my college director while I was bunking the class.My query is from Motarola 680X0 Processor Architecture in division Processor Families of Computer Architecture
Answer» RIGHT choice is (C) ORG The BEST I can explain: The starting ADDRESS is the LOCATION where the program is stored.

Discussion

52.	___________ directive specifies the start of the execution.(a) START(b) ENTRY(c) MAIN(d) ORIGINI have been asked this question in examination.This question is from ARM Architecture topic in chapter Processor Families of Computer Architecture
Answer» The correct answer is (b) ENTRY The best I can explain: This DIRECTIVE INDICATES the beginning of the executable part of the PROGRAM.

Discussion

53.	The address space of the IA-32 is __________(a) 2^16(b) 2^32(c) 2^64(d) 2^8I got this question by my school principal while I was bunking the class.Question is taken from Intel IA-32 Pentium Architecture-1 topic in chapter Processor Families of Computer Architecture
Answer» The correct answer is (B) 2^32 The best explanation: The NUMBER of addressable locations in the memory is CALLED as ADDRESS space.

Discussion

54.	When the page table is placed in the main memory, the ___________ is used to store the recently accessed pages.(a) MMU(b) TLB(c) R0(d) TableI have been asked this question during an internship interview.My query is from Address Translation topic in portion Processor Families of Computer Architecture
Answer» RIGHT answer is (b) TLB To explain I would say: The TLB is USED to store the page NUMBERS of the recently accessed PAGES.

Discussion

55.	The IA-32 system follows _________ design.(a) RISC(b) CISC(c) SIMD(d) None of the mentionedThe question was asked in class test.My question is taken from Intel IA-32 Pentium Architecture-2 topic in division Processor Families of Computer Architecture
Answer» Correct answer is (b) CISC For explanation: This system architecture is USED to reduce the STEPS INVOLVED in execution by PERFORMING complex operations in ONE step.

Discussion

56.	The ARM processors don’t support Byte addressability.(a) True(b) FalseThis question was addressed to me by my college professor while I was bunking the class.My enquiry is from ARM Architecture in section Processor Families of Computer Architecture
Answer» The correct CHOICE is (B) False Easy explanation: The ABILITY to STORE data in the form of consecutive BYTES.

Discussion

57.	The addresses generated by the 68000 is _____ bit.(a) 32(b) 16(c) 24(d) 42The question was asked in a job interview.This interesting question is from Motorola 680X0 Processor Architecture in portion Processor Families of Computer Architecture
Answer» CORRECT answer is (C) 24 To EXPLAIN: The size of the address is DIRECTLY related to the address space of the SYSTEM.

Discussion

58.	The IA-32 processor can switch between 16 bit operation and 32 bit operation with the help of instruction prefix bit.(a) True(b) FalseThis question was addressed to me during an online interview.This intriguing question comes from Intel IA-32 Pentium Architecture-1 topic in portion Processor Families of Computer Architecture
Answer» The correct OPTION is (a) True To EXPLAIN: This switching enables a WIDE RANGE of operations to be PERFORMED.

Discussion

59.	REPINS instruction is used to __________(a) Transfer a block of data serially from an Input device to the processor(b) Transfer a block of data parallelly from Input device to the processor(c) Transfer a block of data serially from an Input device to the output device(d) Transfer a block of data parallelly from Input device to the output deviceI had been asked this question during an interview.This question is from Intel IA-32 Pentium Architecture-2 in division Processor Families of Computer Architecture
Answer» Right CHOICE is (b) Transfer a block of DATA PARALLELLY from Input device to the processor The BEST I can explain: None.

Discussion

60.	The Floating point registers of IA-32 can operate on operands up to ___________(a) 128 bit(b) 256 bit(c) 80 bit(d) 64 bitThe question was asked during an interview for a job.I would like to ask this question from Intel IA-32 Pentium Architecture-1 topic in division Processor Families of Computer Architecture
Answer» Right answer is (d) 64 bit Explanation: The size of the FLOATING NUMBERS that can be STORED in the floating REGISTER.

Discussion

61.	___________ directives are used to initialize operands.(a) INT(b) DATAWORD(c) RESERVE(d) DCDThis question was posed to me during an online interview.The above asked question is from ARM Architecture in portion Processor Families of Computer Architecture
Answer» Right option is (d) DCD For EXPLANATION I WOULD say: These directives are used to INITIALIZE the OPERANDS to a user DEFINED value or a default value.

Discussion

62.	The cache bridges the speed gap between ______ and __________(a) RAM and ROM(b) RAM and Secondary memory(c) Processor and RAM(d) None of the mentionedThe question was posed to me in a job interview.I want to ask this question from Address Translation in portion Processor Families of Computer Architecture
Answer» Correct option is (c) Processor and RAM Explanation: The CACHE is a hardware IMPLEMENTATION to reduce the ACCESS time for processor OPERATIONS.

Discussion

63.	The purpose of using DBcc as a branch instruction is __________(a) It provides two conditions to be satisfied for a branch to occur(b) It provides a counter to check the number of times the branch as taken place(c) It is used to check the condition along with the branch condition(d) None of the mentionedI have been asked this question in a job interview.Origin of the question is Motarola 680X0 Processor Architecture in chapter Processor Families of Computer Architecture
Answer» RIGHT CHOICE is (d) NONE of the mentioned Easiest EXPLANATION: None.

Discussion

64.	The register in 68000 can contain up to _____ bits.(a) 24(b) 32(c) 16(d) 64This question was posed to me in a job interview.This is a very interesting question from Motorola 680X0 Processor Architecture topic in section Processor Families of Computer Architecture
Answer» CORRECT OPTION is (B) 32 The EXPLANATION: NONE.

Discussion

65.	To allocate a block of memory we use ___________ directive.(a) RESERVE(b) DS(c) DATAWORD(d) PLACEI had been asked this question in an interview for job.The query is from Motarola 680X0 Processor Architecture topic in division Processor Families of Computer Architecture
Answer» The CORRECT OPTION is (B) DS Explanation: NONE.

Discussion

66.	The pages size shouldn’t be too small, as this would lead to __________(a) Transfer errors(b) Increase in operation time(c) Increase in access time(d) Decrease in performanceI have been asked this question during an interview.This interesting question is from Address Translation in division Processor Families of Computer Architecture
Answer» Right ANSWER is (C) Increase in access time Explanation: The access time of the magnetic DISK is much longer than the access time of the memory.

Discussion

67.	In IA-32 architecture along with the general flags, the other conditional flags provided are ___________(a) IOPL(b) IF(c) TF(d) All of the mentionedThe question was asked in my homework.Origin of the question is Intel IA-32 Pentium Architecture-1 topic in division Processor Families of Computer Architecture
Answer» Right choice is (d) All of the mentioned Best explanation: These flags are BASICALLY used to CHECK the SYSTEM for EXCEPTIONS.

Discussion

68.	The MMX (Multimedia Extension) operands are stored in __________(a) General purpose registers(b) Banked registers(c) Float point registers(d) Graphic registersThis question was posed to me by my college professor while I was bunking the class.My doubt stems from Intel IA-32 Pentium Architecture-2 topic in section Processor Families of Computer Architecture
Answer» RIGHT ANSWER is (c) Float POINT registers Best explanation: These operands are USED for graphic related operations.

Discussion

69.	The additional duplicate register used in ARM machines are called as _______(a) Copied-registers(b) Banked registers(c) EXtra registers(d) Extential registersI got this question in quiz.This interesting question is from ARM Architecture topic in portion Processor Families of Computer Architecture
Answer» Right answer is (B) Banked REGISTERS To explain I would say: The DUPLICATE registers are used in situations of CONTEXT switching.

Discussion

70.	In the ARM, PC is implemented using ___________(a) Caches(b) Heaps(c) General purpose register(d) StackThe question was asked in an interview.The above asked question is from ARM Architecture topic in portion Processor Families of Computer Architecture
Answer» Right choice is (c) GENERAL purpose register To explain I WOULD say: PC is the place where the next instruction about to be EXECUTED is STORED.

Discussion

71.	For converting a virtual address into the physical address, the programs are divided into __________(a) Pages(b) Frames(c) Segments(d) BlocksI have been asked this question during an online interview.My question is from Address Translation topic in division Processor Families of Computer Architecture
Answer» Right option is (a) PAGES To ELABORATE: On the PHYSICAL MEMORY SIDE the memory is divided into pages.

Discussion

72.	The instructions of IA-32 machines are of length up to ______(a) 4 bytes(b) 8 bytes(c) 16 bytes(d) 12 bytesThis question was addressed to me during an interview.This intriguing question comes from Intel IA-32 Pentium Architecture-2 in portion Processor Families of Computer Architecture
Answer» Right option is (d) 12 bytes Best EXPLANATION: The size of instruction that can be EXECUTED at once.

Discussion

73.	The instruction JG loop does ______(a) jumps to the memory location loop if the result of the most recent arithmetic op is even(b) jumps to the memory location loop if the result of the most recent arithmetic op is greater than 0(c) jumps to the memory location loop if the test condition is satisfied with the value of loop(d) none of the mentionedI got this question during an internship interview.Query is from Intel IA-32 Pentium Architecture-1 in section Processor Families of Computer Architecture
Answer» Right CHOICE is (b) jumps to the memory LOCATION loop if the result of the most recent arithmetic op is GREATER than 0 The best I can explain: This instruction is used to CAUSE a branch based on the outcome of the arithmetic operation.

Discussion

74.	The register used to serve as PC is called as ___________(a) Indirection register(b) Instruction pointer(c) R-32(d) None of the mentionedThis question was posed to me in an interview.Question is from Intel IA-32 Pentium Architecture-1 in portion Processor Families of Computer Architecture
Answer» The correct option is (b) INSTRUCTION pointer Easiest explanation: The PC is USED to store the next instruction that is going to be EXECUTED.

Discussion

75.	All instructions in ARM are conditionally executed.(a) True(b) FalseThe question was asked during an online exam.Question is taken from ARM Architecture topic in portion Processor Families of Computer Architecture
Answer» RIGHT CHOICE is (a) True The EXPLANATION: NONE.

Discussion

76.	The banked registers are used for ______(a) Switching between supervisor and interrupt mode(b) Extended storing(c) Same as other general purpose registers(d) None of the mentionedThis question was addressed to me in final exam.This interesting question is from ARM Architecture in chapter Processor Families of Computer Architecture
Answer» Correct answer is (a) Switching between SUPERVISOR and interrupt mode Easiest EXPLANATION: When switching from one mode to ANOTHER, instead of storing the REGISTER CONTENTS somewhere else it’ll be kept in the duplicate registers and the new values are stored in the actual registers.

Discussion

77.	The constant can be declared using ___________ directive.(a) DATAWORD(b) PLACE(c) CONS(d) DCThis question was posed to me in homework.I want to ask this question from Motarola 680X0 Processor Architecture topic in chapter Processor Families of Computer Architecture
Answer» The CORRECT CHOICE is (d) DC The best I can EXPLAIN: To declare Global CONSTANTS we USE this directive.

Discussion

78.	The bit used to store whether the page has been modified or not is called as _______(a) Dirty bit(b) Modify bit(c) Relocation bit(d) None of the mentionedThis question was posed to me during an interview.My enquiry is from Address Translation in chapter Processor Families of Computer Architecture
Answer» CORRECT answer is (a) DIRTY bit For EXPLANATION: This bit is set after the PAGE in the table gets modified.

Discussion

79.	The virtual memory bridges the size and speed gap between __________ and __________(a) RAM and ROM(b) RAM and Secondary memory(c) Processor and RAM(d) None of the mentionedI have been asked this question in exam.My doubt is from Address Translation in division Processor Families of Computer Architecture
Answer» Right OPTION is (b) RAM and Secondary memory For EXPLANATION: The virtual memory BASICALLY WORKS as an extension of the RAM.

Discussion

80.	When an operand is stored in a register it is _______(a) Stored in the lower order bits of the register(b) Stored in the higher order bits of the register(c) Stored in any of the bits at random(d) None of the mentionedThis question was posed to me in exam.My query is from Motorola 680X0 Processor Architecture topic in section Processor Families of Computer Architecture
Answer» Correct option is (a) STORED in the LOWER order BITS of the register For explanation I would say: The DATA always GETS stored from the lower order to the higher order bits, except in the case of Little Endian architecture.

Discussion

81.	The main importance of ARM micro-processors is providing operation with ______(a) Low cost and low power consumption(b) Higher degree of multi-tasking(c) Lower error or glitches(d) Efficient memory managementThis question was addressed to me in a national level competition.Asked question is from ARM Architecture in division Processor Families of Computer Architecture
Answer» Correct answer is (a) Low COST and low power consumption The explanation: The Stand alone FEATURE of the ARM processors is that they’re ECONOMICALLY viable.

Discussion

82.	Which architecture is suitable for a wide range of data types?(a) ARM(b) 68000(c) IA-32(d) ASUS firebirdI have been asked this question in an online interview.This question is from Intel IA-32 Pentium Architecture-2 topic in chapter Processor Families of Computer Architecture
Answer» Correct ANSWER is (C) IA-32 The best explanation: NONE.

Discussion

83.	The page length shouldn’t be too long because ___________(a) It reduces the program efficiency(b) It increases the access time(c) It leads to wastage of memory(d) None of the mentionedThe question was asked in a national level competition.I'd like to ask this question from Address Translation in chapter Processor Families of Computer Architecture
Answer» Right CHOICE is (C) It leads to wastage of memory Best explanation: If the size is more than the required size then the EXTRA space gets WASTED.

Discussion

84.	The IA-32 architecture associates different parts of memory called __________ with different usages.(a) Frames(b) Pages(c) Tables(d) SegmentsI have been asked this question by my school teacher while I was bunking the class.My doubt stems from Intel IA-32 Pentium Architecture-1 topic in chapter Processor Families of Computer Architecture
Answer» Right ANSWER is (d) Segments Explanation: The MEMORY is DIVIDED into PARTS called as segments.

Discussion

85.	The instruction used to cause unconditional jump is ________(a) UJG(b) JG(c) JMP(d) GOTOThis question was addressed to me at a job interview.Question is taken from Intel IA-32 Pentium Architecture-2 in section Processor Families of Computer Architecture
Answer» Correct CHOICE is (C) JMP The EXPLANATION is: This statement causes a jump from one instruction to another without the condition.

Discussion

86.	The floating point numbers are stored in general purpose register in IA-32.(a) True(b) FalseThis question was posed to me in semester exam.Enquiry is from Intel IA-32 Pentium Architecture-1 in section Processor Families of Computer Architecture
Answer» Correct ANSWER is (b) False Explanation: The floating REGISTERS are not stored in general purpose registers as they have a real PART and a DECIMAL part.

Discussion

87.	The 68000 uses _____ address assignment.(a) Big Endian(b) Little Endian(c) X-Little Endian(d) X-Big EndianI have been asked this question during an internship interview.My doubt is from Motorola 680X0 Processor Architecture in portion Processor Families of Computer Architecture
Answer» The correct answer is (a) BIG Endian The best explanation: The way the data GETS STORED in a memory is called an address assignment.

Discussion

88.	The ability to shift or rotate in the same instruction along with other operation is performed with the help of _________(a) Switching circuit(b) Barrel switcher circuit(c) Integrated Switching circuit(d) Multiplexer circuitI got this question in an interview for job.I'm obligated to ask this question of ARM Architecture in section Processor Families of Computer Architecture
Answer» The CORRECT choice is (b) BARREL switcher circuit Best explanation: These switching circuits are used to BASICALLY switch FAST and to PERFORM better.

Discussion

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The starting address is denoted using _________ directive.(a) EQU(b) ORIGIN(c) ORG(d) PLACEI got this question by my college director while I was bunking the class.My query is from Motarola 680X0 Processor Architecture in division Processor Families of Computer Architecture

___________ directive specifies the start of the execution.(a) START(b) ENTRY(c) MAIN(d) ORIGINI have been asked this question in examination.This question is from ARM Architecture topic in chapter Processor Families of Computer Architecture

The address space of the IA-32 is __________(a) 2^16(b) 2^32(c) 2^64(d) 2^8I got this question by my school principal while I was bunking the class.Question is taken from Intel IA-32 Pentium Architecture-1 topic in chapter Processor Families of Computer Architecture

When the page table is placed in the main memory, the ___________ is used to store the recently accessed pages.(a) MMU(b) TLB(c) R0(d) TableI have been asked this question during an internship interview.My query is from Address Translation topic in portion Processor Families of Computer Architecture

The IA-32 system follows _________ design.(a) RISC(b) CISC(c) SIMD(d) None of the mentionedThe question was asked in class test.My question is taken from Intel IA-32 Pentium Architecture-2 topic in division Processor Families of Computer Architecture

The ARM processors don’t support Byte addressability.(a) True(b) FalseThis question was addressed to me by my college professor while I was bunking the class.My enquiry is from ARM Architecture in section Processor Families of Computer Architecture

The addresses generated by the 68000 is _____ bit.(a) 32(b) 16(c) 24(d) 42The question was asked in a job interview.This interesting question is from Motorola 680X0 Processor Architecture in portion Processor Families of Computer Architecture

___________ directives are used to initialize operands.(a) INT(b) DATAWORD(c) RESERVE(d) DCDThis question was posed to me during an online interview.The above asked question is from ARM Architecture in portion Processor Families of Computer Architecture

The cache bridges the speed gap between and ____(a) RAM and ROM(b) RAM and Secondary memory(c) Processor and RAM(d) None of the mentionedThe question was posed to me in a job interview.I want to ask this question from Address Translation in portion Processor Families of Computer Architecture

The register in 68000 can contain up to _____ bits.(a) 24(b) 32(c) 16(d) 64This question was posed to me in a job interview.This is a very interesting question from Motorola 680X0 Processor Architecture topic in section Processor Families of Computer Architecture

To allocate a block of memory we use ___________ directive.(a) RESERVE(b) DS(c) DATAWORD(d) PLACEI had been asked this question in an interview for job.The query is from Motarola 680X0 Processor Architecture topic in division Processor Families of Computer Architecture

The additional duplicate register used in ARM machines are called as _______(a) Copied-registers(b) Banked registers(c) EXtra registers(d) Extential registersI got this question in quiz.This interesting question is from ARM Architecture topic in portion Processor Families of Computer Architecture

In the ARM, PC is implemented using ___________(a) Caches(b) Heaps(c) General purpose register(d) StackThe question was asked in an interview.The above asked question is from ARM Architecture topic in portion Processor Families of Computer Architecture

The instructions of IA-32 machines are of length up to ______(a) 4 bytes(b) 8 bytes(c) 16 bytes(d) 12 bytesThis question was addressed to me during an interview.This intriguing question comes from Intel IA-32 Pentium Architecture-2 in portion Processor Families of Computer Architecture

The register used to serve as PC is called as ___________(a) Indirection register(b) Instruction pointer(c) R-32(d) None of the mentionedThis question was posed to me in an interview.Question is from Intel IA-32 Pentium Architecture-1 in portion Processor Families of Computer Architecture

All instructions in ARM are conditionally executed.(a) True(b) FalseThe question was asked during an online exam.Question is taken from ARM Architecture topic in portion Processor Families of Computer Architecture

The constant can be declared using ___________ directive.(a) DATAWORD(b) PLACE(c) CONS(d) DCThis question was posed to me in homework.I want to ask this question from Motarola 680X0 Processor Architecture topic in chapter Processor Families of Computer Architecture

The bit used to store whether the page has been modified or not is called as _______(a) Dirty bit(b) Modify bit(c) Relocation bit(d) None of the mentionedThis question was posed to me during an interview.My enquiry is from Address Translation in chapter Processor Families of Computer Architecture

The virtual memory bridges the size and speed gap between and (a) RAM and ROM(b) RAM and Secondary memory(c) Processor and RAM(d) None of the mentionedI have been asked this question in exam.My doubt is from Address Translation in division Processor Families of Computer Architecture

Which architecture is suitable for a wide range of data types?(a) ARM(b) 68000(c) IA-32(d) ASUS firebirdI have been asked this question in an online interview.This question is from Intel IA-32 Pentium Architecture-2 topic in chapter Processor Families of Computer Architecture

The instruction used to cause unconditional jump is ________(a) UJG(b) JG(c) JMP(d) GOTOThis question was addressed to me at a job interview.Question is taken from Intel IA-32 Pentium Architecture-2 in section Processor Families of Computer Architecture

The floating point numbers are stored in general purpose register in IA-32.(a) True(b) FalseThis question was posed to me in semester exam.Enquiry is from Intel IA-32 Pentium Architecture-1 in section Processor Families of Computer Architecture

The 68000 uses _____ address assignment.(a) Big Endian(b) Little Endian(c) X-Little Endian(d) X-Big EndianI have been asked this question during an internship interview.My doubt is from Motorola 680X0 Processor Architecture in portion Processor Families of Computer Architecture