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8-bit PROCESSOR - 8085 / Z80 / 6800;

16-bit Processor - 8086 / 68000 / Z8000;

32-bit Processor - 80386 / 80486

8-bit Processor - 8085 / Z80 / 6800;

16-bit Processor - 8086 / 68000 / Z8000;

32-bit Processor - 80386 / 80486

Because 8085 PROCESSOR has 8 bit ALU (Arithmetic LOGIC REVIEW). Similarly 8086 processor has 16 bit ALU.

Because 8085 processor has 8 bit ALU (Arithmetic Logic Review). Similarly 8086 processor has 16 bit ALU.

The PROCESSING speed DEPENDS on DATA BUS WIDTH.

The processing speed depends on DATA BUS WIDTH.

The address BUS is UNIDIRECTIONAL because the address information is always given by the Micro Processor to address a MEMORY LOCATION of an INPUT / output devices.

The address bus is unidirectional because the address information is always given by the Micro Processor to address a memory location of an input / output devices.

The data BUS is Bidirectional because the same bus is USED for transfer of data between Micro Processor and memory or input / output DEVICES in both the DIRECTION.

The data bus is Bidirectional because the same bus is used for transfer of data between Micro Processor and memory or input / output devices in both the direction.

Latch is a Dtype flipflop used as a temporary storage device controlled by a timing signal, which can store 0 or 1. The PRIMARY function of a Latch is data storage. It is used in OUTPUT devices such as LED, to HOLD the data for display.

Latch is a Dtype flipflop used as a temporary storage device controlled by a timing signal, which can store 0 or 1. The primary function of a Latch is data storage. It is used in output devices such as LED, to hold the data for display.

If for a SHORT period of time circuits goes to some different logic level then it is supposed to have then it is called static hazard.e.g. If the final logic VALUE of output of a given circuit becomes one even if it is supposed to be ZERO then it is called Static0 Hazard and vice VERSA. Dynamic Hazard is the one in which the circuit output goes to some other logic level more than once then finally SETTLING down to some appropriate level.

If for a short period of time circuits goes to some different logic level then it is supposed to have then it is called static hazard.e.g. If the final logic value of output of a given circuit becomes one even if it is supposed to be zero then it is called Static0 Hazard and vice versa. Dynamic Hazard is the one in which the circuit output goes to some other logic level more than once then finally settling down to some appropriate level.

In primary storage device the storage capacity is limited. It has a VOLATILE MEMORY. In secondary storage device the storage capacity is larger. It is a NONVOLATILE memory. Primary devices are: RAM / ROM. Secondary devices are: Floppy disc / HARD disk.

In primary storage device the storage capacity is limited. It has a volatile memory. In secondary storage device the storage capacity is larger. It is a nonvolatile memory. Primary devices are: RAM / ROM. Secondary devices are: Floppy disc / Hard disk.

Static RAM: No refreshing, 6 to 8 MOS transistors are required to form one MEMORY cell, INFORMATION stored as VOLTAGE level in a flip flop. Dynamic RAM: Refreshed periodically, 3 to 4 transistors are required to form one memory cell, Information is stored as a charge in the gate to substrate capacitance.

Static RAM: No refreshing, 6 to 8 MOS transistors are required to form one memory cell, Information stored as voltage level in a flip flop. Dynamic RAM: Refreshed periodically, 3 to 4 transistors are required to form one memory cell, Information is stored as a charge in the gate to substrate capacitance.

INTERRUPT is a signal SEND by external device to the processor so as to REQUEST the processor to perform a particular WORK.

A signal informing a program that an event has occurred. When a program receives an interrupt signal, it takes a specified action (which can be to IGNORE the signal).

Interrupt is a signal send by external device to the processor so as to request the processor to perform a particular work.

A signal informing a program that an event has occurred. When a program receives an interrupt signal, it takes a specified action (which can be to ignore the signal).

Floating gate Avalanche INJECTION MOS (FAMOS) TRANSISTOR is USED in each CELL of EPROM.

Floating gate Avalanche Injection MOS (FAMOS) transistor is used in each cell of EPROM.

RAM: Read / Write MEMORY, High SPEED, Volatile Memory. ROM: Read only memory, Low Speed, Non Voliate Memory.

RAM: Read / Write memory, High Speed, Volatile Memory. ROM: Read only memory, Low Speed, Non Voliate Memory.

Compiler is used to translate the highlevel language program into machine CODE at a TIME. It doesn't require special instruction to STORE in a memory, it stores AUTOMATICALLY. The Execution time is less compared to Interpreter.

A compiler is a program that translates a SOURCE program written in some highlevel programming language (such as Java) into machine code for some computer architecture (such as the Intel Pentium architecture).

Compiler is used to translate the highlevel language program into machine code at a time. It doesn't require special instruction to store in a memory, it stores automatically. The Execution time is less compared to Interpreter.

A compiler is a program that translates a source program written in some highlevel programming language (such as Java) into machine code for some computer architecture (such as the Intel Pentium architecture).

All X86 PROCESSORS have PIPELINED STRUCTURE.

All x86 processors have pipelined structure.

ROM cannot be USED as STACK because it is not POSSIBLE to WRITE to ROM.

ROM cannot be used as stack because it is not possible to write to ROM.

30 DAYS.Explanation:Before:One day work = 1 / 20One man?s one day work = 1 / ( 20 * 75)Now:No. f WORKERS = 50One day work = 50 * 1 / ( 20 * 75)The total no. of days REQUIRED to complete the work = (75 * 20) / 50 = 30.

30 days.Explanation:Before:One day work = 1 / 20One man?s one day work = 1 / ( 20 * 75)Now:No. f workers = 50One day work = 50 * 1 / ( 20 * 75)The total no. of days required to complete the work = (75 * 20) / 50 = 30.

and GATE

and gate

For D LATCH:always@(ENABLE)q<=d;

For D flip flop:always@(POSEDGE CLOCK)q<=d;

For D Latch:always@(enable)q<=d;

For D flip flop:always@(posedge clock)q<=d;

A blocking ASSIGNMENT is one in which the statements are executed SEQUENTIALLY, i.e. first statement is executed and variable is assigned a value then second is executed and so on. A NON blocking assignment is one in which statements occurs CONCURRENTLY. Only nonblocking assignments should be used in sequential circuit.

e.g

initial
begin
a=b; //blocking
c<=a; //nonblocking
d=c; //blocking
end

In this EXAMPLE firstly the value of b is assigned to a and this value is assigned to c only after execution of first statement. The second and the third statements are executed simultaneously, i.e.

value a is assigned to c and previous value if c is assigned to d.

A blocking assignment is one in which the statements are executed sequentially, i.e. first statement is executed and variable is assigned a value then second is executed and so on. A non blocking assignment is one in which statements occurs concurrently. Only nonblocking assignments should be used in sequential circuit.

e.g

initial
begin
a=b; //blocking
c<=a; //nonblocking
d=c; //blocking
end

In this example firstly the value of b is assigned to a and this value is assigned to c only after execution of first statement. The second and the third statements are executed simultaneously, i.e.

value a is assigned to c and previous value if c is assigned to d.