Which bit in control register defines the address bit or idle line multiprocessor protocol mode?(a) MM(b) URXWIE(c) URXIE(d) RXWakeI had been asked this question in an online quiz.Question is taken from USART Protocol in portion Internet Principles of IOT

Which bit in control register defines the address bit or idle line mul

1.	Which bit in control register defines the address bit or idle line multiprocessor protocol mode?(a) MM(b) URXWIE(c) URXIE(d) RXWakeI had been asked this question in an online quiz.Question is taken from USART Protocol in portion Internet Principles of IOT
Answer» The correct choice is (a) MM To explain I would say: The MM BIT in control REGISTER defines the address bit or idle line MULTIPROCESSOR protocol mode. Both formats use the wake up on transmitting, using the address FEATURE function (TWWake bit), and on activating the RXWake bit.

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Which bit in control register defines the address bit or idle line multiprocessor protocol mode?(a) MM(b) URXWIE(c) URXIE(d) RXWakeI had been asked this question in an online quiz.Question is taken from USART Protocol in portion Internet Principles of IOT

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