191 + Interview Questions in Memory System in Computer Architecture Page 2 InterviewSolution

51.	The completion of the memory operation is indicated using ______ signal.(a) MFC(b) WMFC(c) CFC(d) None of the mentionedI have been asked this question by my college professor while I was bunking the class.My question is based upon Single BUS Organisation in section Memory System of Computer Architecture
Answer» Correct OPTION is (a) MFC For explanation I WOULD say: MFC STANDS for Memory Function COMPLETE.

Discussion

52.	The main virtue for using single Bus structure is ________(a) Fast data transfers(b) Cost effective connectivity and speed(c) Cost effective connectivity and ease of attaching peripheral devices(d) None of the mentionedThe question was asked in examination.My doubt is from Single BUS Organisation topic in portion Memory System of Computer Architecture
Answer» The correct OPTION is (c) Cost effective connectivity and EASE of ATTACHING PERIPHERAL devices Explanation: None.

Discussion

53.	The signals are grouped such that mutually exclusive signals are put together.(a) True(b) FalseI had been asked this question in an interview for job.My doubt stems from Microprogrammed Control topic in section Memory System of Computer Architecture
Answer» Correct OPTION is (a) True Explanation: This is done to improve the EFFICIENCY of the CONTROLLER.

Discussion

54.	In associative mapping during LRU, the counter of the new block is set to ‘0’ and all the others are incremented by one when _____ occurs.(a) Delay(b) Miss(c) Hit(d) Delayed hitI have been asked this question by my school principal while I was bunking the class.I need to ask this question from Replacement Algorithms in section Memory System of Computer Architecture
Answer» CORRECT OPTION is (b) Miss For explanation I would say: Miss USUALLY OCCURS when the memory block required is not present in the cache.

Discussion

55.	To extend the connectivity of the processor bus we use ______(a) PCI bus(b) SCSI bus(c) Controllers(d) Multiple busI got this question in exam.This interesting question is from Single BUS Organisation topic in section Memory System of Computer Architecture
Answer» Correct CHOICE is (a) PCI bus The EXPLANATION: The PCI BUS basically is used to CONNECT to memory devices.

Discussion

56.	An effective to introduce parallelism in memory access is by _______(a) Memory interleaving(b) TLB(c) Pages(d) FramesThe question was posed to me at a job interview.Asked question is from Performance of Caches topic in section Memory System of Computer Architecture
Answer» RIGHT option is (a) MEMORY interleaving To explain: Interleaving divides the memory into MODULES.

Discussion

57.	Which register in the processor is single directional?(a) MAR(b) MDR(c) PC(d) TempThis question was addressed to me during an online interview.The above asked question is from Single BUS Organisation in division Memory System of Computer Architecture
Answer» The correct choice is (a) MAR Explanation: The MAR is single DIRECTIONAL as it just TAKES the address from the PROCESSOR bus and passes it to the external bus.

Discussion

58.	The _____ process divides the disk into sectors and tracks.(a) Creation(b) Initiation(c) Formatting(d) ModificationI had been asked this question in final exam.My question is based upon Secondary Storage topic in division Memory System of Computer Architecture
Answer» The correct option is (C) FORMATTING The best explanation: The formatting process deletes the DATA present and does the creation of SECTORS and tracks.

Discussion

59.	The digital information is stored on the hard disk by ____________(a) Applying a suitable electric pulse(b) Applying a suitable magnetic field(c) Applying a suitable nuclear field(d) By using optic wavesI had been asked this question during an internship interview.The origin of the question is Secondary Storage in division Memory System of Computer Architecture
Answer» Right choice is (a) Applying a SUITABLE ELECTRIC pulse Explanation: The digital data is SORTED on the magnetized DISCS by magnetizing the AREAS.

Discussion

60.	Every time a new instruction is loaded into IR the output of ________ is loaded into UPC.(a) Starting address generator(b) Loader(c) Linker(d) ClockI had been asked this question during an interview for a job.The above asked question is from Microprogrammed Control in chapter Memory System of Computer Architecture
Answer» Correct answer is (a) Starting ADDRESS generator The EXPLANATION is: The starting address generator is used to load the address of the NEXT micro INSTRUCTION.

Discussion

61.	The type of control signal is generated based on ________(a) contents of the step counter(b) Contents of IR(c) Contents of condition flags(d) All of the mentionedI got this question during an online interview.I need to ask this question from Hardwired Control topic in chapter Memory System of Computer Architecture
Answer» Right CHOICE is (d) All of the mentioned Easiest EXPLANATION: BASED on the information above the type of CONTROL SIGNAL is decided.

Discussion

62.	The PC gets incremented _____________(a) After the instruction decoding(b) After the IR instruction gets executed(c) After the fetch cycle(d) None of the mentionedI have been asked this question by my college professor while I was bunking the class.I need to ask this question from Single BUS Organisation in portion Memory System of Computer Architecture
Answer» RIGHT choice is (c) After the fetch cycle To ELABORATE: The PC always points to the next INSTRUCTION to be executed.

Discussion

63.	The CPU is also called as ________(a) Processor hub(b) ISP(c) Controller(d) All of the mentionedI have been asked this question in an international level competition.This intriguing question comes from Single BUS Organisation topic in section Memory System of Computer Architecture
Answer» Correct answer is (B) ISP The explanation: ISP STANDS for Instruction Set PROCESSOR.

Discussion

64.	In LRU, the referenced blocks counter is set to’0′ and that of the previous blocks are incremented by one and others remain same, in the case of ______(a) Hit(b) Miss(c) Delay(d) None of the mentionedThe question was posed to me in a national level competition.My query is from Cache Miss and Hit topic in portion Memory System of Computer Architecture
Answer» CORRECT option is (a) Hit The explanation: If the referenced block is PRESENT in the MEMORY it is called as hit.

Discussion

65.	The main memory is structured into modules each with its own address register called ______(a) ABR(b) TLB(c) PC(d) IRThis question was addressed to me by my school teacher while I was bunking the class.The doubt is from Cache Miss and Hit topic in section Memory System of Computer Architecture
Answer» Correct OPTION is (a) ABR To EXPLAIN I WOULD SAY: ABR stands for Address Buffer Register.

Discussion

66.	_____ pushes the heads away from the surface as they rotate at their standard rates.(a) Magnetic tension(b) Electric force(c) Air pressure(d) None of the mentionedThe question was asked in an online interview.Enquiry is from Secondary Storage topic in portion Memory System of Computer Architecture
Answer» The correct ANSWER is (c) AIR pressure The best I can explain: DUE to the speed of rotation of the discs air pressure DEVELOPS in the hard disk.

Discussion

67.	The access time is composed of __________(a) Seek time(b) Rotational delay(c) Latency(d) Both Seek time and Rotational delayI had been asked this question in my homework.This key question is from Secondary Storage topic in division Memory System of Computer Architecture
Answer» The correct option is (d) Both Seek time and Rotational delay To ELABORATE: The seek time REFERS to the time required to move the head to the required DISK.

Discussion

68.	The bus used to connect the monitor to the CPU is ____________(a) PCI bus(b) SCSI bus(c) Memory bus(d) RambusThe question was asked in an interview for internship.My query is from Single BUS Organisation in chapter Memory System of Computer Architecture
Answer» Correct answer is (b) SCSI bus Explanation: The SCSI (SMALL COMPONENT System Interconnect) is USED to connect to DISPLAY devices.

Discussion

69.	In set associative and associative mapping there exists less flexibility.(a) True(b) FalseI had been asked this question in an interview.My doubt is from Replacement Algorithms in division Memory System of Computer Architecture
Answer» Right option is (b) False To EXPLAIN I WOULD say: The above two methods of MAPPING the DECISION of which block to be removed rests with the cache controller.

Discussion

70.	The special memory used to store the micro routines of a computer is ________(a) Control table(b) Control store(c) Control mart(d) Control shopI got this question in a job interview.I'd like to ask this question from Microprogrammed Control topic in portion Memory System of Computer Architecture
Answer» The correct ANSWER is (b) Control STORE Explanation: The control store is USED as a reference to get the required control routine.

Discussion

71.	The small extremely fast, RAM’s all called as ________(a) Cache(b) Heaps(c) Accumulators(d) StacksThis question was posed to me in an international level competition.The above asked question is from Single BUS Organisation topic in chapter Memory System of Computer Architecture
Answer» Correct option is (b) Heaps The best EXPLANATION: Cache’s are EXTREMELY ESSENTIAL in SINGLE BUS organisation to ACHIEVE fast operation.

Discussion

72.	The read and write operations usually start at ______ of the sector.(a) Center(b) Middle(c) From the last used point(d) BoundariesThis question was posed to me in class test.Origin of the question is Secondary Storage topic in division Memory System of Computer Architecture
Answer» The CORRECT CHOICE is (d) Boundaries The best I can explain: The heads read and WRITE data from the ENDS to the center.

Discussion

73.	The main aim of virtual memory organisation is ________(a) To provide effective memory access(b) To provide better memory transfer(c) To improve the execution of the program(d) All of the mentionedI got this question in unit test.Question is from Virtual Memory topic in section Memory System of Computer Architecture
Answer» The CORRECT OPTION is (d) All of the mentioned To EXPLAIN: NONE.

Discussion

74.	In micro-programmed approach, the signals are generated by ______(a) Machine instructions(b) System programs(c) Utility tools(d) None of the mentionedI have been asked this question in homework.The question is from Microprogrammed Control topic in section Memory System of Computer Architecture
Answer» Correct ANSWER is (a) Machine instructions Easy EXPLANATION: The machine instructions GENERATE the signals.

Discussion

75.	The DMA doesn’t make use of the MMU for bulk data transfers.(a) True(b) FalseI got this question in homework.My doubt is from Virtual Memory in portion Memory System of Computer Architecture
Answer» Right option is (B) False For explanation I would say: The DMA STANDS for Direct MEMORY ACCESS, in which a block of data gets directly transferred from the memory.

Discussion

76.	The LRU can be improved by providing a little randomness in the access.(a) True(b) FalseThe question was asked by my school teacher while I was bunking the class.Origin of the question is Replacement Algorithms in chapter Memory System of Computer Architecture
Answer» CORRECT OPTION is (a) True To ELABORATE: NONE.

Discussion

77.	What does the RUN signal do?(a) It causes the termination of a signal(b) It causes a particular signal to perform its operation(c) It causes a particular signal to end(d) It increments the step counter by oneThe question was posed to me in class test.Question is taken from Hardwired Control in section Memory System of Computer Architecture
Answer» Correct answer is (d) It increments the step COUNTER by ONE Best explanation: The RUN SIGNAL increments the step counter by one for each clock cycle.

Discussion

78.	To distinguish between two sectors we make use of ________(a) Inter sector gap(b) Splitting bit(c) Numbering bit(d) None of the mentionedThis question was posed to me in semester exam.I'd like to ask this question from Secondary Storage in chapter Memory System of Computer Architecture
Answer» The correct option is (a) INTER sector gap For explanation I WOULD say: This MEANS that we leave a little gap between each sector to DIFFERENTIATE between them.

Discussion

79.	One of the most widely used schemes of encoding used is _________(a) NRZ-polar(b) RZ-polar(c) Manchester(d) Block encodingI had been asked this question by my college professor while I was bunking the class.The query is from Secondary Storage topic in chapter Memory System of Computer Architecture
Answer» Right CHOICE is (C) MANCHESTER The explanation: The Manchester encoding used is also called as phase encoding and it is used to ENCODE both CLOCK and data.

Discussion

80.	For the synchronization of the read head, we make use of a _______(a) Framing bit(b) Synchronization bit(c) Clock(d) Dirty bitThis question was addressed to me during an internship interview.Question is taken from Secondary Storage topic in chapter Memory System of Computer Architecture
Answer» CORRECT answer is (C) Clock Easy explanation: The clock makes it easy to DISTINGUISH between different values RED by a HEAD.

Discussion

81.	The algorithm which removes the recently used page first is ________(a) LRU(b) MRU(c) OFM(d) None of the mentionedThe question was asked in a national level competition.My question comes from Replacement Algorithms topic in chapter Memory System of Computer Architecture
Answer» The correct choice is (b) MRU For EXPLANATION I would say: In MRU it is ASSUMED that the PAGE ACCESSED now is LESS likely to be accessed again.

Discussion

82.	A sequence of control words corresponding to a control sequence is called _______(a) Micro routine(b) Micro function(c) Micro procedure(d) None of the mentionedThis question was addressed to me by my school principal while I was bunking the class.Question is from Microprogrammed Control topic in section Memory System of Computer Architecture
Answer» The CORRECT option is (a) Micro routine For EXPLANATION: The micro routines are used to PERFORM a particular task.

Discussion

83.	The surroundings of the recently accessed block is called as ______(a) Neighborhood(b) Neighbour(c) Locality of reference(d) None of the mentionedThis question was addressed to me during an online exam.This intriguing question comes from Replacement Algorithms topic in division Memory System of Computer Architecture
Answer» The CORRECT answer is (c) Locality of reference The BEST EXPLANATION: The locality of reference is a KEY factor in many of the replacement ALGORITHMS.

Discussion

84.	The directly mapped cache no replacement algorithm is required.(a) True(b) FalseI have been asked this question in an online interview.Origin of the question is Replacement Algorithms in chapter Memory System of Computer Architecture
Answer» The correct OPTION is (a) True The best I can explain: The POSITION of each block is pre-determined in the DIRECT MAPPED cache, hence no NEED for replacement.

Discussion

85.	The name hardwired came because the sequence of operations carried out is determined by the wiring.(a) True(b) FalseThis question was addressed to me in semester exam.The above asked question is from Hardwired Control topic in chapter Memory System of Computer Architecture
Answer» The CORRECT choice is (a) True The explanation is: In other words hardwired is another NAME for Hardware CONTROL signal GENERATOR.

Discussion

86.	The ISA standard Buses are used to connect ___________(a) RAM and processor(b) GPU and processor(c) Harddisk and Processor(d) CD/DVD drives and ProcessorThis question was posed to me in class test.This intriguing question comes from Single BUS Organisation topic in section Memory System of Computer Architecture
Answer» The correct OPTION is (C) HARDDISK and Processor To explain I WOULD SAY: None.

Discussion

87.	The transparent register/s is/are __________(a) Y(b) Z(c) Temp(d) All of the mentionedI have been asked this question by my college director while I was bunking the class.The origin of the question is Single BUS Organisation in portion Memory System of Computer Architecture
Answer» The correct option is (d) All of the mentioned To explain: These registers are USUALLY used to store TEMPORARY VALUES.

Discussion

88.	The main reason for the discontinuation of semi conductor based storage devices for providing large storage space is _________(a) Lack of sufficient resources(b) High cost per bit value(c) Lack of speed of operation(d) None of the mentionedI have been asked this question in an interview for internship.This interesting question is from Secondary Storage topic in division Memory System of Computer Architecture
Answer» Right choice is (b) High cost per bit value For EXPLANATION: In the case of semi CONDUCTOR based MEMORY technology, we GET speed but the increase in the integration of various devices the cost is high.

Discussion

89.	The techniques which move the program blocks to or from the physical memory is called as ______(a) Paging(b) Virtual memory organisation(c) Overlays(d) FramingI got this question during a job interview.My query is from Virtual Memory topic in chapter Memory System of Computer Architecture
Answer» Correct answer is (B) VIRTUAL memory organisation The best explanation: By USING this technique the PROGRAM execution is accomplished with a USAGE of less space.

Discussion

90.	The performance of the system is greatly influenced by increasing the level 1 cache.(a) True(b) FalseThe question was asked in an interview.The doubt is from Performance of Caches topic in section Memory System of Computer Architecture
Answer» RIGHT CHOICE is (a) True Explanation: This is so because the L1 CACHE is onboard the PROCESSOR.

Discussion

91.	The disadvantage/s of the hardwired approach is ________(a) It is less flexible(b) It cannot be used for complex instructions(c) It is costly(d) less flexible & cannot be used for complex instructionsI have been asked this question in homework.The question is from Hardwired Control topic in division Memory System of Computer Architecture
Answer» The correct choice is (d) LESS flexible & cannot be used for complex instructions The EXPLANATION is: The more complex the instruction set less applicable to a hardwired APPROACH.

Discussion

92.	If the instruction Add R1, R2, R3 is executed in a system which is pipelined, then the value of S is (Where S is term of the Basic performance equation).(a) 3(b) ~2(c) ~1(d) 6The question was asked in an online quiz.This question is from Multiple BUS Organistaion in division Memory System of Computer Architecture
Answer» The CORRECT option is (C) ~1 Explanation: The value will be much lower in CASE of MULTIPLE BUS ORGANISATION.

Discussion

93.	A common strategy for performance is making various functional units operate parallelly.(a) True(b) FalseThis question was addressed to me in a national level competition.This question is from Single BUS Organisation in section Memory System of Computer Architecture
Answer» The correct choice is (a) True For EXPLANATION I would say: By PARALLELLY ACCESSING data we can have a PIPELINED processor.

Discussion

94.	The extra time needed to bring the data into memory in case of a miss is called as __________(a) Delay(b) Propagation time(c) Miss penalty(d) None of the mentionedThe question was asked during an internship interview.I need to ask this question from Cache Miss and Hit topic in portion Memory System of Computer Architecture
Answer» RIGHT CHOICE is (C) MISS penalty To explain: NONE.

Discussion

95.	The number failed attempts to access memory, stated in the form of a fraction is called as _________(a) Hit rate(b) Miss rate(c) Failure rate(d) Delay rateThe question was asked in semester exam.My question comes from Cache Miss and Hit in division Memory System of Computer Architecture
Answer» The correct answer is (b) Miss rate Explanation: The miss rate is a key factor in DECIDING the TYPE of replacement ALGORITHM.

Discussion

96.	In memory interleaving, the lower order bits of the address is used to _____________(a) Get the data(b) Get the address of the module(c) Get the address of the data within the module(d) None of the mentionedThis question was addressed to me in an internship interview.The doubt is from Cache Miss and Hit topic in portion Memory System of Computer Architecture
Answer» Right CHOICE is (b) GET the ADDRESS of the module For EXPLANATION: To implement parallelism in data access we USE interleaving.

Discussion

97.	The number successful accesses to memory stated as a fraction is called as _____(a) Hit rate(b) Miss rate(c) Success rate(d) Access rateThis question was addressed to me in homework.My question is from Cache Miss and Hit topic in section Memory System of Computer Architecture
Answer» RIGHT choice is (a) Hit RATE To elaborate: The hit rate is an IMPORTANT FACTOR in performance measurement.

Discussion

98.	In a three BUS architecture, how many input and output ports are there?(a) 2 output and 2 input(b) 1 output and 2 input(c) 2 output and 1 input(d) 1 output and 1 inputThe question was asked during a job interview.My question is based upon Multiple BUS Organistaion topic in portion Memory System of Computer Architecture
Answer» The correct CHOICE is (c) 2 output and 1 input The best explanation: That is enabling READING from TWO locations and WRITING into one.

Discussion

99.	The last on the hierarchy scale of memory devices is ______(a) Main memory(b) Secondary memory(c) TLB(d) Flash drivesI have been asked this question in a national level competition.This question is from Hierarchy of Memory topic in portion Memory System of Computer Architecture
Answer» CORRECT ANSWER is (b) Secondary MEMORY Easiest explanation: The secondary memory is the slowest memory DEVICE.

Discussion

100.	The set-associative map technique is a combination of the direct and associative technique.(a) True(b) FalseThe question was asked in an internship interview.My question is from Mapping Functions in chapter Memory System of Computer Architecture
Answer» Right choice is (a) True To elaborate: The combination of the EFFICIENCY of the associative METHOD and the cheapness of the direct MAPPING, we GET the set-associative mapping.

Discussion

Explore topic-wise InterviewSolutions in .

The signals are grouped such that mutually exclusive signals are put together.(a) True(b) FalseI had been asked this question in an interview for job.My doubt stems from Microprogrammed Control topic in section Memory System of Computer Architecture

To extend the connectivity of the processor bus we use ______(a) PCI bus(b) SCSI bus(c) Controllers(d) Multiple busI got this question in exam.This interesting question is from Single BUS Organisation topic in section Memory System of Computer Architecture

An effective to introduce parallelism in memory access is by _______(a) Memory interleaving(b) TLB(c) Pages(d) FramesThe question was posed to me at a job interview.Asked question is from Performance of Caches topic in section Memory System of Computer Architecture

Which register in the processor is single directional?(a) MAR(b) MDR(c) PC(d) TempThis question was addressed to me during an online interview.The above asked question is from Single BUS Organisation in division Memory System of Computer Architecture

The _____ process divides the disk into sectors and tracks.(a) Creation(b) Initiation(c) Formatting(d) ModificationI had been asked this question in final exam.My question is based upon Secondary Storage topic in division Memory System of Computer Architecture

The CPU is also called as ________(a) Processor hub(b) ISP(c) Controller(d) All of the mentionedI have been asked this question in an international level competition.This intriguing question comes from Single BUS Organisation topic in section Memory System of Computer Architecture

The main memory is structured into modules each with its own address register called ______(a) ABR(b) TLB(c) PC(d) IRThis question was addressed to me by my school teacher while I was bunking the class.The doubt is from Cache Miss and Hit topic in section Memory System of Computer Architecture

_____ pushes the heads away from the surface as they rotate at their standard rates.(a) Magnetic tension(b) Electric force(c) Air pressure(d) None of the mentionedThe question was asked in an online interview.Enquiry is from Secondary Storage topic in portion Memory System of Computer Architecture

The access time is composed of __________(a) Seek time(b) Rotational delay(c) Latency(d) Both Seek time and Rotational delayI had been asked this question in my homework.This key question is from Secondary Storage topic in division Memory System of Computer Architecture

The bus used to connect the monitor to the CPU is ____________(a) PCI bus(b) SCSI bus(c) Memory bus(d) RambusThe question was asked in an interview for internship.My query is from Single BUS Organisation in chapter Memory System of Computer Architecture

In set associative and associative mapping there exists less flexibility.(a) True(b) FalseI had been asked this question in an interview.My doubt is from Replacement Algorithms in division Memory System of Computer Architecture

The special memory used to store the micro routines of a computer is ________(a) Control table(b) Control store(c) Control mart(d) Control shopI got this question in a job interview.I'd like to ask this question from Microprogrammed Control topic in portion Memory System of Computer Architecture

The small extremely fast, RAM’s all called as ________(a) Cache(b) Heaps(c) Accumulators(d) StacksThis question was posed to me in an international level competition.The above asked question is from Single BUS Organisation topic in chapter Memory System of Computer Architecture

The read and write operations usually start at ______ of the sector.(a) Center(b) Middle(c) From the last used point(d) BoundariesThis question was posed to me in class test.Origin of the question is Secondary Storage topic in division Memory System of Computer Architecture

In micro-programmed approach, the signals are generated by ______(a) Machine instructions(b) System programs(c) Utility tools(d) None of the mentionedI have been asked this question in homework.The question is from Microprogrammed Control topic in section Memory System of Computer Architecture

The DMA doesn’t make use of the MMU for bulk data transfers.(a) True(b) FalseI got this question in homework.My doubt is from Virtual Memory in portion Memory System of Computer Architecture

The LRU can be improved by providing a little randomness in the access.(a) True(b) FalseThe question was asked by my school teacher while I was bunking the class.Origin of the question is Replacement Algorithms in chapter Memory System of Computer Architecture

To distinguish between two sectors we make use of ________(a) Inter sector gap(b) Splitting bit(c) Numbering bit(d) None of the mentionedThis question was posed to me in semester exam.I'd like to ask this question from Secondary Storage in chapter Memory System of Computer Architecture

One of the most widely used schemes of encoding used is _________(a) NRZ-polar(b) RZ-polar(c) Manchester(d) Block encodingI had been asked this question by my college professor while I was bunking the class.The query is from Secondary Storage topic in chapter Memory System of Computer Architecture

For the synchronization of the read head, we make use of a _______(a) Framing bit(b) Synchronization bit(c) Clock(d) Dirty bitThis question was addressed to me during an internship interview.Question is taken from Secondary Storage topic in chapter Memory System of Computer Architecture

The algorithm which removes the recently used page first is ________(a) LRU(b) MRU(c) OFM(d) None of the mentionedThe question was asked in a national level competition.My question comes from Replacement Algorithms topic in chapter Memory System of Computer Architecture

The directly mapped cache no replacement algorithm is required.(a) True(b) FalseI have been asked this question in an online interview.Origin of the question is Replacement Algorithms in chapter Memory System of Computer Architecture

The name hardwired came because the sequence of operations carried out is determined by the wiring.(a) True(b) FalseThis question was addressed to me in semester exam.The above asked question is from Hardwired Control topic in chapter Memory System of Computer Architecture

The transparent register/s is/are __________(a) Y(b) Z(c) Temp(d) All of the mentionedI have been asked this question by my college director while I was bunking the class.The origin of the question is Single BUS Organisation in portion Memory System of Computer Architecture

The techniques which move the program blocks to or from the physical memory is called as ______(a) Paging(b) Virtual memory organisation(c) Overlays(d) FramingI got this question during a job interview.My query is from Virtual Memory topic in chapter Memory System of Computer Architecture

The performance of the system is greatly influenced by increasing the level 1 cache.(a) True(b) FalseThe question was asked in an interview.The doubt is from Performance of Caches topic in section Memory System of Computer Architecture

A common strategy for performance is making various functional units operate parallelly.(a) True(b) FalseThis question was addressed to me in a national level competition.This question is from Single BUS Organisation in section Memory System of Computer Architecture

The number failed attempts to access memory, stated in the form of a fraction is called as _________(a) Hit rate(b) Miss rate(c) Failure rate(d) Delay rateThe question was asked in semester exam.My question comes from Cache Miss and Hit in division Memory System of Computer Architecture

The number successful accesses to memory stated as a fraction is called as _____(a) Hit rate(b) Miss rate(c) Success rate(d) Access rateThis question was addressed to me in homework.My question is from Cache Miss and Hit topic in section Memory System of Computer Architecture

The last on the hierarchy scale of memory devices is ______(a) Main memory(b) Secondary memory(c) TLB(d) Flash drivesI have been asked this question in a national level competition.This question is from Hierarchy of Memory topic in portion Memory System of Computer Architecture

The set-associative map technique is a combination of the direct and associative technique.(a) True(b) FalseThe question was asked in an internship interview.My question is from Mapping Functions in chapter Memory System of Computer Architecture