191 + Interview Questions in Memory System in Computer Architecture Page 4 InterviewSolution

151.	The chip can be disabled or cut off from an external connection using ______(a) Chip select(b) LOCK(c) ACPT(d) RESETI got this question in quiz.The question is from Large Memories in division Memory System of Computer Architecture
Answer» The correct option is (a) CHIP select The BEST explanation: The chip GETS enabled if the CS is set OTHERWISE the chip gets disabled.

Discussion

152.	The only draw back of using the early start protocol is _______(a) Time delay(b) Complexity of circuit(c) Latency(d) High miss rateI had been asked this question in class test.This intriguing question comes from Mapping Functions in division Memory System of Computer Architecture
Answer» Correct option is (b) Complexity of circuit Explanation: In this protocol, the required BLOCK is read and DIRECTLY SENT to the PROCESSOR.

Discussion

153.	The algorithm to remove and place new contents into the cache is called _______(a) Replacement algorithm(b) Renewal algorithm(c) Updation(d) None of the mentionedThis question was addressed to me in exam.The query is from Caches in portion Memory System of Computer Architecture
Answer» Right OPTION is (a) Replacement algorithm Explanation: As the cache GETS full, older contents of the cache are SWAPPED out with NEWER contents. This decision is taken by the algorithm.

Discussion

154.	The copy-back protocol is used ________(a) To copy the contents of the memory onto the cache(b) To update the contents of the memory from the cache(c) To remove the contents of the cache and push it on to the memory(d) None of the mentionedI have been asked this question during an interview.My question is based upon Caches topic in chapter Memory System of Computer Architecture
Answer» The CORRECT choice is (b) To UPDATE the contents of the memory from the cache To EXPLAIN: This is another way of performing the WRITE operation, WHEREIN the cache is updated first and then the memory.

Discussion

155.	The correspondence between the main memory blocks and those in the cache is given by _________(a) Hash function(b) Mapping function(c) Locale function(d) Assign functionThe question was asked during an internship interview.My question is taken from Caches in section Memory System of Computer Architecture
Answer» CORRECT answer is (B) Mapping FUNCTION The best I can EXPLAIN: The mapping function is used to map the CONTENTS of the memory to the cache.

Discussion

156.	The next level of memory hierarchy after the L2 cache is _______(a) Secondary storage(b) TLB(c) Main memory(d) RegisterI got this question in an internship interview.The question is from Hierarchy of Memory in portion Memory System of Computer Architecture
Answer» The CORRECT CHOICE is (d) Register The EXPLANATION is: NONE.

Discussion

157.	The larger memory placed between the primary cache and the memory is called ______(a) Level 1 cache(b) Level 2 cache(c) EEPROM(d) TLBThis question was posed to me during an interview.My enquiry is from Hierarchy of Memory in chapter Memory System of Computer Architecture
Answer» The correct choice is (b) Level 2 cache To explain: This is BASICALLY used to provide EFFECTIVE memory MAPPING.

Discussion

158.	_________ circuit is used to restore the capacitor value.(a) Sense amplify(b) Signal amplifier(c) Delta modulator(d) None of the mentionedThis question was posed to me in a national level competition.My doubt is from Asynchronous DRAM topic in chapter Memory System of Computer Architecture
Answer» CORRECT option is (a) Sense amplify For EXPLANATION I would SAY: The sense AMPLIFIER detects if the value is above or below the threshold and then RESTORES it.

Discussion

159.	The time taken to transfer a word of data to or from the memory is called as ______(a) Access time(b) Cycle time(c) Memory latency(d) None of the mentionedI got this question in an internship interview.Asked question is from Synchronous DRAM in portion Memory System of Computer Architecture
Answer» The CORRECT option is (C) Memory LATENCY To ELABORATE: The performance of the memory is measured by means of latency.

Discussion

160.	The number of external connections required in 16 X 8 memory organisation is _____(a) 14(b) 19(c) 15(d) 12I have been asked this question in a job interview.I'd like to ask this question from Static Memories topic in portion Memory System of Computer Architecture
Answer» Correct OPTION is (a) 14 Explanation: In the 14, 8-data lines,4-address lines and 2 are sense/write and CS signals.

Discussion

161.	The technique of searching for a block by going through all the tags is ______(a) Linear search(b) Binary search(c) Associative search(d) None of the mentionedThe question was asked in my homework.This interesting question is from Mapping Functions in portion Memory System of Computer Architecture
Answer» Correct OPTION is (C) Associative search The explanation: NONE.

Discussion

162.	The RAMBUS requires specially designed memory chips similar to _____(a) SRAM(b) SDRAM(c) DRAM(d) DDRRAMI have been asked this question in an online quiz.This interesting question is from RamBus Memory topic in portion Memory System of Computer Architecture
Answer» Correct ANSWER is (c) DRAM The explanation is: The SPECIAL memory chip should be ABLE to TRANSMIT data on both the EDGES and is called as RDRAM’s.

Discussion

163.	The type of signaling used in RAMBUS is ______(a) CLK signaling(b) Differential signaling(c) Integral signaling(d) None of the mentionedI have been asked this question in an interview for job.This intriguing question comes from RamBus Memory in division Memory System of Computer Architecture
Answer» CORRECT choice is (b) DIFFERENTIAL signaling Explanation: The differential signaling basically MEANS USING voltage swings to TRANSMIT data.

Discussion

164.	A 16 X 8 Organisation of memory cells, can store upto _____(a) 256 bits(b) 1024 bits(c) 512 bits(d) 128 bitsI have been asked this question during an interview for a job.Question is from Static Memories in section Memory System of Computer Architecture
Answer» CORRECT answer is (d) 128 BITS The explanation is: It can store upto 128 bits as each CELL can hold one BIT of DATA.

Discussion

165.	The associative mapping is costlier than direct mapping.(a) True(b) FalseThe question was posed to me in examination.My question is taken from Mapping Functions in portion Memory System of Computer Architecture
Answer» CORRECT option is (a) True The explanation is: In ASSOCIATIVE mapping, all the TAGS have to be SEARCHED to FIND the block.

Discussion

166.	The cells in a row are connected to a common line called ______(a) Work line(b) Word line(c) Length line(d) Principle diagonalThe question was posed to me in an interview for internship.Query is from Static Memories in portion Memory System of Computer Architecture
Answer» The correct CHOICE is (b) Word line The best I can EXPLAIN: This MEANS that the cell contents TOGETHER FORM one word of instruction or data.

Discussion

167.	The word line is driven by the _____(a) Chip select(b) Address decoder(c) Data line(d) Control lineI had been asked this question at a job interview.My doubt is from Static Memories in division Memory System of Computer Architecture
Answer» The correct ANSWER is (B) Address decoder Best EXPLANATION: NONE.

Discussion

168.	In ________ protocol the information is directly written into the main memory.(a) Write through(b) Write back(c) Write first(d) None of the mentionedThe question was posed to me during an online interview.My doubt is from Mapping Functions in portion Memory System of Computer Architecture
Answer» CORRECT answer is (a) Write through Easy explanation: In CASE of the miss, then the data GETS written DIRECTLY in main memory.

Discussion

169.	The flash memory modules designed to replace the functioning of a hard disk is ______(a) RIMM(b) Flash drives(c) FIMM(d) DIMMI got this question in final exam.My enquiry is from Read-Only Memory topic in section Memory System of Computer Architecture
Answer» Correct option is (b) Flash drives For EXPLANATION I would say: The flash drives have been DEVELOPED to PROVIDE FASTER operation but with lesser space.

Discussion

170.	The only difference between the EEPROM and flash memory is that the latter doesn’t allow bulk data to be written.(a) True(b) FalseThis question was addressed to me in unit test.I would like to ask this question from Read-Only Memory topic in section Memory System of Computer Architecture
Answer» CORRECT CHOICE is (a) True To explain: This is not permitted as the previous CONTENTS of the CELLS will be overwritten.

Discussion

171.	RAMBUS is better than the other memory chips in terms of ________(a) Efficiency(b) Speed of operation(c) Wider bandwidth(d) All of the mentionedThe question was asked during a job interview.Question is from RamBus Memory in section Memory System of Computer Architecture
Answer» Correct CHOICE is (b) SPEED of operation Easy explanation: The RAMBUS is MUCH advanced mode of memory storage.

Discussion

172.	The Reason for the disregarding of the SRAM’s is ________(a) Low Efficiency(b) High power consumption(c) High Cost(d) All of the mentionedThe question was posed to me during an internship interview.My question is from Asynchronous DRAM topic in division Memory System of Computer Architecture
Answer» Right CHOICE is (c) High Cost To ELABORATE: The REASON for the high cost of the SRAM is because of the usage of more number of TRANSISTORS.

Discussion

173.	MFC is used to _________(a) Issue a read signal(b) Signal to the device that the memory read operation is complete(c) Signal the processor the memory operation is complete(d) Assign a device to perform the read operationThis question was posed to me in class test.Enquiry is from Static Memories in section Memory System of Computer Architecture
Answer» CORRECT answer is (c) Signal the processor the memory operation is COMPLETE The EXPLANATION: The MFC stands for memory Function Complete.

Discussion

174.	The method of mapping the consecutive memory blocks to consecutive cache blocks is called ______(a) Set associative(b) Associative(c) Direct(d) IndirectThe question was posed to me during an online exam.Query is from Mapping Functions topic in portion Memory System of Computer Architecture
Answer» Right answer is (c) DIRECT Explanation: This METHOD is most simple to IMPLEMENT as it INVOLVES direct mapping of memory blocks.

Discussion

175.	The fastest data access is provided using _______(a) Caches(b) DRAM’s(c) SRAM’s(d) RegistersI got this question in homework.I'm obligated to ask this question of Hierarchy of Memory topic in section Memory System of Computer Architecture
Answer» CORRECT option is (d) Registers For explanation I would SAY: The fastest data ACCESS is provided USING registers as these memory locations are SITUATED inside the processor.

Discussion

176.	In a SDRAM each row is refreshed every 64ms.(a) True(b) FalseThis question was posed to me in homework.Question is taken from Synchronous DRAM in division Memory System of Computer Architecture
Answer» RIGHT OPTION is (a) True To ELABORATE: NONE.

Discussion

177.	The memory blocks are mapped on to the cache with the help of ______(a) Hash functions(b) Vectors(c) Mapping functions(d) None of the mentionedI had been asked this question in exam.My question is based upon Mapping Functions in chapter Memory System of Computer Architecture
Answer» The correct option is (c) MAPPING FUNCTIONS Explanation: The mapping functions are USED to map the MEMORY blocks on to their corresponding cache block.

Discussion

178.	A RAMBUS which has 18 data lines is called as _______(a) Extended RAMBUS(b) Direct RAMBUS(c) Multiple RAMBUS(d) Indirect RAMBUSThis question was posed to me in my homework.My question is based upon RamBus Memory topic in section Memory System of Computer Architecture
Answer» Right option is (b) DIRECT RAMBUS For explanation: The direct RAMBUS is used to transmit 2 BYTES of data at a time.

Discussion

179.	The temporal aspect of the locality of reference means ________(a) That the recently executed instruction won’t be executed soon(b) That the recently executed instruction is temporarily not referenced(c) That the recently executed instruction will be executed soon again(d) None of the mentionedThe question was asked by my school teacher while I was bunking the class.Asked question is from Caches topic in division Memory System of Computer Architecture
Answer» CORRECT answer is (C) That the RECENTLY executed instruction will be executed soon again Explanation: None.

Discussion

180.	The standard SRAM chips are costly as _________(a) They use highly advanced micro-electronic devices(b) They house 6 transistor per chip(c) They require specially designed PCB’s(d) None of the mentionedThis question was posed to me in an internship interview.I need to ask this question from Hierarchy of Memory in section Memory System of Computer Architecture
Answer» The correct choice is (B) They HOUSE 6 TRANSISTOR per chip For explanation: As they require a large NUMBER of transistors, their COST per bit increases.

Discussion

181.	The SRAM’s are basically used as ______(a) Registers(b) Caches(c) TLB(d) BufferThe question was asked in an internship interview.I'd like to ask this question from Large Memories in chapter Memory System of Computer Architecture
Answer» RIGHT answer is (B) CACHES For explanation I would SAY: The SRAM’s are used as caches as their OPERATION speed is very high.

Discussion

182.	The less space consideration as lead to the development of ________ (for large memories).(a) SIMM’s(b) DIMS’s(c) SRAM’s(d) Both SIMM’s and DIMS’sThe question was posed to me during an interview for a job.The origin of the question is Large Memories in division Memory System of Computer Architecture
Answer» Right choice is (d) Both SIMM’s and DIMS’s For explanation I WOULD say: The SIMM (single inline memory module) or DIMM (DUAL inline memory module) occupy LESS space while PROVIDING greater memory space.

Discussion

183.	The cells in each column are connected to ______(a) Word line(b) Data line(c) Read line(d) Sense/ Write lineI had been asked this question during an online exam.I would like to ask this question from Static Memories topic in section Memory System of Computer Architecture
Answer» CORRECT CHOICE is (d) Sense/ Write line To explain I would say: The CELLS in each COLUMN are connected to the sense/write circuit using TWO bit lines and which is in turn connected to the data lines.

Discussion

184.	__________ is the bottleneck, when it comes computer performance.(a) Memory access time(b) Memory cycle time(c) Delay(d) LatencyI had been asked this question during an internship interview.This interesting question is from Static Memories in division Memory System of Computer Architecture
Answer» Right option is (b) Memory cycle time To explain I would say: The processor can execute instructions FASTER than they’re FETCHED, hence cycle time is the BOTTLENECK for performance.

Discussion

185.	The memory module obtained by placing a number of flash chips for higher memory storage called as _______(a) FIMM(b) SIMM(c) Flash card(d) RIMMThe question was posed to me at a job interview.Origin of the question is Read-Only Memory topic in division Memory System of Computer Architecture
Answer» CORRECT choice is (C) Flash card The best I can EXPLAIN: None.

Discussion

186.	In the memory hierarchy, as the speed of operation increases the memory size also increases.(a) True(b) FalseThis question was addressed to me in exam.This intriguing question comes from Hierarchy of Memory topic in division Memory System of Computer Architecture
Answer» CORRECT option is (b) False Explanation: As the speed of operation INCREASES the cost increases and the SIZE DECREASES.

Discussion

187.	EEPROM stands for Electrically Erasable Programmable Read Only Memory.(a) True(b) FalseThe question was asked during an interview for a job.The above asked question is from Read-Only Memory in chapter Memory System of Computer Architecture
Answer» RIGHT OPTION is (a) True The best I can explain: The DISADVANTAGES of the EPROM led to the development of the EEPROM.

Discussion

188.	The disadvantage of the EPROM chip is _______(a) The high cost factor(b) The low efficiency(c) The low speed of operation(d) The need to remove the chip physically to reprogram itThe question was asked in an interview for job.This intriguing question originated from Read-Only Memory in portion Memory System of Computer Architecture
Answer» Right CHOICE is (d) The NEED to REMOVE the chip PHYSICALLY to reprogram it The best I can explain: NONE.

Discussion

189.	To overcome the slow operating speeds of the secondary memory we make use of faster flash drives.(a) True(b) FalseThis question was posed to me during an online interview.The above asked question is from Hierarchy of Memory topic in portion Memory System of Computer Architecture
Answer» Correct CHOICE is (a) True To elaborate: To IMPROVE the SPEED we use flash drives at the COST of memory space.

Discussion

190.	PROM stands for __________(a) Programmable Read Only Memory(b) Pre-fed Read Only Memory(c) Pre-required Read Only Memory(d) Programmed Read Only MemoryThis question was addressed to me in an online interview.This question is from Read-Only Memory topic in section Memory System of Computer Architecture
Answer» CORRECT answer is (a) PROGRAMMABLE Read Only Memory For explanation: It allows the USER to PROGRAM the ROM.

Discussion

191.	The difference in the address and data connection between DRAM’s and SDRAM’s is _______(a) The usage of more number of pins in SDRAM’s(b) The requirement of more address lines in SDRAM’s(c) The usage of a buffer in SDRAM’s(d) None of the mentionedThis question was addressed to me by my school principal while I was bunking the class.My doubt stems from Synchronous DRAM topic in division Memory System of Computer Architecture
Answer» The CORRECT choice is (c) The usage of a BUFFER in SDRAM’s To explain I would say: The SDRAM USES buffered storage of address and data.

Discussion

Explore topic-wise InterviewSolutions in .

The chip can be disabled or cut off from an external connection using ______(a) Chip select(b) LOCK(c) ACPT(d) RESETI got this question in quiz.The question is from Large Memories in division Memory System of Computer Architecture

The only draw back of using the early start protocol is _______(a) Time delay(b) Complexity of circuit(c) Latency(d) High miss rateI had been asked this question in class test.This intriguing question comes from Mapping Functions in division Memory System of Computer Architecture

The algorithm to remove and place new contents into the cache is called _______(a) Replacement algorithm(b) Renewal algorithm(c) Updation(d) None of the mentionedThis question was addressed to me in exam.The query is from Caches in portion Memory System of Computer Architecture

The next level of memory hierarchy after the L2 cache is _______(a) Secondary storage(b) TLB(c) Main memory(d) RegisterI got this question in an internship interview.The question is from Hierarchy of Memory in portion Memory System of Computer Architecture

The larger memory placed between the primary cache and the memory is called ______(a) Level 1 cache(b) Level 2 cache(c) EEPROM(d) TLBThis question was posed to me during an interview.My enquiry is from Hierarchy of Memory in chapter Memory System of Computer Architecture

_________ circuit is used to restore the capacitor value.(a) Sense amplify(b) Signal amplifier(c) Delta modulator(d) None of the mentionedThis question was posed to me in a national level competition.My doubt is from Asynchronous DRAM topic in chapter Memory System of Computer Architecture

The time taken to transfer a word of data to or from the memory is called as ______(a) Access time(b) Cycle time(c) Memory latency(d) None of the mentionedI got this question in an internship interview.Asked question is from Synchronous DRAM in portion Memory System of Computer Architecture

The number of external connections required in 16 X 8 memory organisation is _____(a) 14(b) 19(c) 15(d) 12I have been asked this question in a job interview.I'd like to ask this question from Static Memories topic in portion Memory System of Computer Architecture

The technique of searching for a block by going through all the tags is ______(a) Linear search(b) Binary search(c) Associative search(d) None of the mentionedThe question was asked in my homework.This interesting question is from Mapping Functions in portion Memory System of Computer Architecture

The RAMBUS requires specially designed memory chips similar to _____(a) SRAM(b) SDRAM(c) DRAM(d) DDRRAMI have been asked this question in an online quiz.This interesting question is from RamBus Memory topic in portion Memory System of Computer Architecture

The type of signaling used in RAMBUS is ______(a) CLK signaling(b) Differential signaling(c) Integral signaling(d) None of the mentionedI have been asked this question in an interview for job.This intriguing question comes from RamBus Memory in division Memory System of Computer Architecture

A 16 X 8 Organisation of memory cells, can store upto _____(a) 256 bits(b) 1024 bits(c) 512 bits(d) 128 bitsI have been asked this question during an interview for a job.Question is from Static Memories in section Memory System of Computer Architecture

The associative mapping is costlier than direct mapping.(a) True(b) FalseThe question was posed to me in examination.My question is taken from Mapping Functions in portion Memory System of Computer Architecture

The cells in a row are connected to a common line called ______(a) Work line(b) Word line(c) Length line(d) Principle diagonalThe question was posed to me in an interview for internship.Query is from Static Memories in portion Memory System of Computer Architecture

The word line is driven by the _____(a) Chip select(b) Address decoder(c) Data line(d) Control lineI had been asked this question at a job interview.My doubt is from Static Memories in division Memory System of Computer Architecture

In ________ protocol the information is directly written into the main memory.(a) Write through(b) Write back(c) Write first(d) None of the mentionedThe question was posed to me during an online interview.My doubt is from Mapping Functions in portion Memory System of Computer Architecture

The flash memory modules designed to replace the functioning of a hard disk is ______(a) RIMM(b) Flash drives(c) FIMM(d) DIMMI got this question in final exam.My enquiry is from Read-Only Memory topic in section Memory System of Computer Architecture

The only difference between the EEPROM and flash memory is that the latter doesn’t allow bulk data to be written.(a) True(b) FalseThis question was addressed to me in unit test.I would like to ask this question from Read-Only Memory topic in section Memory System of Computer Architecture

RAMBUS is better than the other memory chips in terms of ________(a) Efficiency(b) Speed of operation(c) Wider bandwidth(d) All of the mentionedThe question was asked during a job interview.Question is from RamBus Memory in section Memory System of Computer Architecture

The Reason for the disregarding of the SRAM’s is ________(a) Low Efficiency(b) High power consumption(c) High Cost(d) All of the mentionedThe question was posed to me during an internship interview.My question is from Asynchronous DRAM topic in division Memory System of Computer Architecture

The method of mapping the consecutive memory blocks to consecutive cache blocks is called ______(a) Set associative(b) Associative(c) Direct(d) IndirectThe question was posed to me during an online exam.Query is from Mapping Functions topic in portion Memory System of Computer Architecture

The fastest data access is provided using _______(a) Caches(b) DRAM’s(c) SRAM’s(d) RegistersI got this question in homework.I'm obligated to ask this question of Hierarchy of Memory topic in section Memory System of Computer Architecture

In a SDRAM each row is refreshed every 64ms.(a) True(b) FalseThis question was posed to me in homework.Question is taken from Synchronous DRAM in division Memory System of Computer Architecture

The memory blocks are mapped on to the cache with the help of ______(a) Hash functions(b) Vectors(c) Mapping functions(d) None of the mentionedI had been asked this question in exam.My question is based upon Mapping Functions in chapter Memory System of Computer Architecture

A RAMBUS which has 18 data lines is called as _______(a) Extended RAMBUS(b) Direct RAMBUS(c) Multiple RAMBUS(d) Indirect RAMBUSThis question was posed to me in my homework.My question is based upon RamBus Memory topic in section Memory System of Computer Architecture

The SRAM’s are basically used as ______(a) Registers(b) Caches(c) TLB(d) BufferThe question was asked in an internship interview.I'd like to ask this question from Large Memories in chapter Memory System of Computer Architecture

The cells in each column are connected to ______(a) Word line(b) Data line(c) Read line(d) Sense/ Write lineI had been asked this question during an online exam.I would like to ask this question from Static Memories topic in section Memory System of Computer Architecture

__________ is the bottleneck, when it comes computer performance.(a) Memory access time(b) Memory cycle time(c) Delay(d) LatencyI had been asked this question during an internship interview.This interesting question is from Static Memories in division Memory System of Computer Architecture

The memory module obtained by placing a number of flash chips for higher memory storage called as _______(a) FIMM(b) SIMM(c) Flash card(d) RIMMThe question was posed to me at a job interview.Origin of the question is Read-Only Memory topic in division Memory System of Computer Architecture

In the memory hierarchy, as the speed of operation increases the memory size also increases.(a) True(b) FalseThis question was addressed to me in exam.This intriguing question comes from Hierarchy of Memory topic in division Memory System of Computer Architecture

EEPROM stands for Electrically Erasable Programmable Read Only Memory.(a) True(b) FalseThe question was asked during an interview for a job.The above asked question is from Read-Only Memory in chapter Memory System of Computer Architecture

To overcome the slow operating speeds of the secondary memory we make use of faster flash drives.(a) True(b) FalseThis question was posed to me during an online interview.The above asked question is from Hierarchy of Memory topic in portion Memory System of Computer Architecture