A basic S-R flip-flop can be constructed by cross-coupling of which basic logic gates?(a) AND or OR gates(b) XOR or XNOR gates(c) NOR or NAND gates(d) AND or NOR gatesThe question was asked during an interview.My question comes from Flip Flops in chapter Flip-Flops of Digital Circuits

A basic S-R flip-flop can be constructed by cross-coupling of which ba

1.	A basic S-R flip-flop can be constructed by cross-coupling of which basic logic gates?(a) AND or OR gates(b) XOR or XNOR gates(c) NOR or NAND gates(d) AND or NOR gatesThe question was asked during an interview.My question comes from Flip Flops in chapter Flip-Flops of Digital Circuits
Answer» The correct answer is (c) NOR or NAND GATES For EXPLANATION I would say: The basic S-R flip-flop can be CONSTRUCTED by cross coupling of NOR or NAND gates. Cross coupling means the OUTPUT of second gate is fed to the input of first gate and vice-versa.

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For D flip-flop to JK flip-flop, the characteristics equation is given by ___________(a) D=JQ(p)’+Q(p)K’(b) D=JQ(p)’+KQ(p)’(c) D=JQ(p)+Q(p)K’(d) D=J’Q(p)+Q(p)KI got this question in quiz.This interesting question is from Realisation of one Flip-flop using other Flip-flops topic in portion Flip-Flops of Digital Circuits
For realisation of D flip-flop from SR flip-flop, the external input is given through ___________(a) S(b) R(c) D(d) Both S and RI have been asked this question in an online quiz.The origin of the question is Realisation of one Flip-flop using other Flip-flops topic in portion Flip-Flops of Digital Circuits
For realisation of SR flip-flop from JK flip-flop, if S=1, R=0 & present state is 0 then the excitation input will be ___________(a) J=1, K=1(b) J=X, K=1(c) J=1, K=X(d) J=0, K=0The question was asked in an interview for job.This intriguing question originated from Realisation of one Flip-flop using other Flip-flops topic in section Flip-Flops of Digital Circuits
The K-map simplification for realisation of SR flip-flop from JK flip-flop is ___________(a) J=1, K=0(b) J=R, K=S(c) J=S, K=R(d) J=0, K=1This question was posed to me in semester exam.The question is from Realisation of one Flip-flop using other Flip-flops in division Flip-Flops of Digital Circuits
For realisation of SR flip-flop from JK flip-flop, if S=1, R=0 & present state is 0 then next state will be ___________(a) 1(b) 0(c) Don’t care(d) ToggleThis question was addressed to me by my school teacher while I was bunking the class.Query is from Realisation of one Flip-flop using other Flip-flops in division Flip-Flops of Digital Circuits
For realisation of SR flip-flop from JK flip-flop, the excitation input will be obtained from ___________(a) S and R(b) R input(c) J and K input(d) D inputI have been asked this question in an online quiz.Question is taken from Realisation of one Flip-flop using other Flip-flops in chapter Flip-Flops of Digital Circuits
For realisation of JK flip-flop from SR flip-flop, if J=1, K=0 & present state is 0(i.e. Q(n)=0) then excitation input will be ___________(a) S=0, R=1(b) S=X, R=0(c) S=1, R=0(d) S=1, R=1The question was posed to me in an international level competition.This key question is from Realisation of one Flip-flop using other Flip-flops in portion Flip-Flops of Digital Circuits
For realisation of JK flip-flop from SR flip-flop, the input J and K will be given as ___________(a) External inputs to S and R(b) Internal inputs to S and R(c) External inputs to combinational circuit(d) Internal inputs to combinational circuitThe question was asked in an online interview.My question comes from Realisation of one Flip-flop using other Flip-flops in division Flip-Flops of Digital Circuits
For realisation of JK flip-flop from SR flip-flop, if J=0 & K=0 then the input is ___________(a) S=0, R=0(b) S=0, R=X(c) S=X, R=0(d) S=X, R=XThe question was posed to me at a job interview.Origin of the question is Realisation of one Flip-flop using other Flip-flops topic in chapter Flip-Flops of Digital Circuits
To realise one flip-flop using another flip-flop along with a combinational circuit, known as ____________(a) PREVIOUS state decoder(b) NEXT state decoder(c) MIDDLE state decoder(d) PRESENT state decoderThis question was posed to me in homework.This intriguing question comes from Realisation of one Flip-flop using other Flip-flops topic in chapter Flip-Flops of Digital Circuits

A basic S-R flip-flop can be constructed by cross-coupling of which basic logic gates?(a) AND or OR gates(b) XOR or XNOR gates(c) NOR or NAND gates(d) AND or NOR gatesThe question was asked during an interview.My question comes from Flip Flops in chapter Flip-Flops of Digital Circuits

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