50 + Interview Questions in Registers in Digital Circuits Page 1 InterviewSolution

1.	A bidirectional 4-bit shift register is storing the nibble 1101. Its input is HIGH. The nibble 1011 is waiting to be entered on the serial data-input line. After three clock pulses, the shift register is storing ________(a) 1101(b) 0111(c) 0001(d) 1110I had been asked this question by my college professor while I was bunking the class.My question is taken from Universal Shift Registers topic in section Registers of Digital Circuits
Answer» Correct option is (b) 0111 Easiest explanation: Mode is high MEANS it’s a right shift REGISTER. Then after 3 clock pulses enter bits are 011 and remained bit in register is 1. Therefore, 0111 is the required solution. 1011 \| 1101 101 \| 1110-> 1^st clock PULSE 10 \| 1111-> 2^ndclock pulse 1 \| 0111-> 3^rd clock pulse.

Discussion

2.	To operate correctly, starting a ring shift counter requires __________(a) Clearing all the flip-flops(b) Presetting one flip-flop and clearing all others(c) Clearing one flip-flop and presetting all others(d) Presetting all the flip-flopsI had been asked this question at a job interview.This question is from Universal Shift Registers topic in portion Registers of Digital Circuits
Answer» Correct choice is (b) Presetting one flip-flop and clearing all OTHERS To elaborate: In Ring counter, the feedback of the output of the FF is fed to the same FF’s INPUT. To OPERATE correctly, starting a ring shift counter requires presetting one flip-flop and clearing all others so that it can shift to the next bit.

Discussion

3.	Another way to connect devices to a shared data bus is to use a ____________(a) Circulating gate(b) Transceiver(c) Bidirectional encoder(d) Strobed latchI got this question by my school principal while I was bunking the class.I need to ask this question from Ring Counter in chapter Registers of Digital Circuits
Answer» Correct choice is (b) Transceiver Best explanation: A transceiver is a device comprising both a TRANSMITTER and a receiver which are COMBINED and share common circuitry or a single HOUSING. When no circuitry is common between transmit and RECEIVE FUNCTIONS, the device is a transmitter-receiver.

Discussion

4.	To keep output data accurate, 4-bit series-in, parallel-out shift registers employ a ____________(a) Divide-by-4 clock pulse(b) Sequence generator(c) Strobe line(d) MultiplexerThe question was posed to me during an internship interview.This key question is from Ring Counter in division Registers of Digital Circuits
Answer» Correct choice is (C) Strobe line The best I can explain: In computer or memory technology, a strobe is a signal that is sent that validates DATA or other signals on ADJACENT parallel lines. Thus, in REGISTERS the strobe line is there to CHECK the availability of data.

Discussion

5.	Which is not characteristic of a shift register?(a) Serial in/parallel in(b) Serial in/parallel out(c) Parallel in/serial out(d) Parallel in/parallel outI had been asked this question by my college director while I was bunking the class.This interesting question is from Ring Counter topic in chapter Registers of Digital Circuits
Answer» RIGHT answer is (a) SERIAL in/parallel in The best I can explain: There is no such type of register present who doesn’t have OUTPUT END. Thus, Serial in/Parallel in is not a CHARACTERISTIC of a shift register. There has to be an output, be it serial or parallel.

Discussion

6.	What is the preset condition for a ring shift counter?(a) All FFs set to 1(b) All FFs cleared to 0(c) A single 0, the rest 1(d) A single 1, the rest 0I have been asked this question by my college director while I was bunking the class.I'd like to ask this question from Ring Counter topic in division Registers of Digital Circuits
Answer» The CORRECT option is (d) A single 1, the rest 0 The best explanation: A ring shift COUNTER is a counter in which the output of one FF connected to the input of the adjacent FF. In preset condition, all of the BITS are 0 except first one.

Discussion

7.	What is the function of a buffer circuit?(a) To provide an output that is inverted from that on the input(b) To provide an output that is equal to its input(c) To clean up the input(d) To clean up the outputThis question was addressed to me during an online exam.My query is from Ring Counter topic in chapter Registers of Digital Circuits
Answer» Correct option is (b) To provide an OUTPUT that is EQUAL to its input To elaborate: The FUNCTION of a buffer CIRCUIT is to provide an output that is equal to its input. A transceiver circuit is a buffer that can operate in both directions right as well as left.

Discussion

8.	Which type of device may be used to interface a parallel data format with external equipment’s serial format?(a) UART(b) Key matrix(c) Memory chip(d) Series in Parallel outI got this question during an online exam.Query is from Ring Counter in chapter Registers of Digital Circuits
Answer» The correct OPTION is (a) UART To explain I would say: UART means Universal Asynchronous Receiver/Transmitter which converts the BYTES it receives from the computer along parallel circuits into a single SERIAL BIT stream for OUTBOUND transmission. And also receives data in serial form and converts it into parallel form and sent to the processor.

Discussion

9.	A 74HC195 4-bit parallel access shift register can be used for ____________(a) Serial in/serial out operation(b) Serial in/parallel out operation(c) Parallel in/serial out operation(d) All of the MentionedI had been asked this question by my school principal while I was bunking the class.The above asked question is from Ring Counter in portion Registers of Digital Circuits
Answer» Correct ANSWER is (d) All of the Mentioned The EXPLANATION: 74HC195 is an IC, which can be used for all of the given operations, as well as for, parallel-in/parallel-out.

Discussion

10.	Ring shift and Johnson counters are ____________(a) Synchronous counters(b) Asynchronous counters(c) True binary counters(d) Synchronous and true binary countersThis question was addressed to me in homework.My enquiry is from Ring Counter topic in chapter Registers of Digital Circuits
Answer» Right answer is (a) SYNCHRONOUS counters Easiest explanation: Synchronous counters are the counters being triggered in the presence of a clock pulse. Since all of the clock INPUTS are connected through a SINGLE clock pulse in RING SHIFT and johnson counters. So, both are synchronous counters.

Discussion

11.	What is a transceiver circuit?(a) A buffer that transfers data from input to output(b) A buffer that transfers data from output to input(c) A buffer that can operate in both directions(d) A buffer that can operate in one directionI had been asked this question during a job interview.This intriguing question comes from Ring Counter topic in chapter Registers of Digital Circuits
Answer» Right OPTION is (c) A buffer that can OPERATE in both directions Explanation: A transceiver CIRCUIT is a buffer that can operate in both directions right as WELL as left.

Discussion

12.	What is the difference between a shift-right register and a shift-left register?(a) There is no difference(b) The direction of the shift(c) Propagation delay(d) The clock inputI had been asked this question in final exam.My question is based upon Ring Counter in portion Registers of Digital Circuits
Answer» Right answer is (b) The DIRECTION of the shift To explain I WOULD say: In shift-right register, shifting of BIT takes place towards the right and towards LEFT for shift-left register. Thus, both the registers vary in the shifting of their direction.

Discussion

13.	How much storage capacity does each stage in a shift register represent?(a) One bit(b) Two bits(c) Four bits(d) Eight bitsI have been asked this question by my college director while I was bunking the class.The question is from Shift Register Counters in division Registers of Digital Circuits
Answer» The CORRECT choice is (a) ONE bit Explanation: A register is made of flip-flops. And each flip-flop stores 1 bit of DATA. Thus, a shift register has the capability to store one bit and if ANOTHER bit is to store, in such a situation it deletes the previous data and stores them.

Discussion

14.	If a 10-bit ring counter has an initial state 1101000000, what is the state after the second clock pulse?(a) 1101000000(b) 0011010000(c) 1100000000(d) 0000000000I got this question in an interview for job.I would like to ask this question from Shift Register Counters in division Registers of Digital Circuits
Answer» CORRECT choice is (b) 0011010000 The explanation: After shifting 2-bit we GET the output as 0011010000 (Since two ZEROS are at 1^st position and 2^nd position which came from the last two bits). As in a ring counter, the bits rotate in clockwise direction.

Discussion

15.	In a 4-bit Johnson counter sequence, there are a total of how many states or bit patterns?(a) 1(b) 3(c) 4(d) 8I got this question during an interview for a job.I'd like to ask this question from Shift Register Counters in section Registers of Digital Circuits
Answer» Correct option is (d) 8 The EXPLANATION: In JOHNSON COUNTER, total number of states are DETERMINED by 2^N = 24 = 16 Total Number of Used states = 2N = 24 = 8 Total Number of Unused states = 16 – 8 = 8.

Discussion

16.	What type of register would have a complete binary number shifted in one bit at a time and have all the stored bits shifted out one at a time?(a) Parallel-in Parallel-out(b) Parallel-in Serial-out(c) Serial-in Serial-out(d) Serial-in Parallel-outI have been asked this question in an online quiz.Question is taken from Shift Register Counters in portion Registers of Digital Circuits
Answer» Correct choice is (c) SERIAL-in Serial-out The explanation: Serial-in Serial-out register would have a complete binary number shifted in ONE bit at a time and have all the stored bits shifted out one at a time. SINCE in serial TRANSMISSION, bits are TRANSMITTED or received one at a time and not simultaneously.

Discussion

17.	The group of bits 10110111 is serially shifted (right-most bit first) into an 8-bit parallel output shift register with an initial state 11110000. After two clock pulses, the register contains ______________(a) 10111000(b) 10110111(c) 11110000(d) 11111100I had been asked this question in class test.My question comes from Shift Register Counters topic in portion Registers of Digital Circuits
Answer» The correct option is (d) 11111100 The best I can EXPLAIN: After first clock pulse, the register CONTAINS 11111000. After second clock pulse, the register would contain 11111100. Since the BITS are SHIFTED to the right at every clock pulse.

Discussion

18.	By adding recirculating lines to a 4-bit parallel-in serial-out shift register, it becomes a ________ ________ and ________ out register.(a) Parallel-in, serial, parallel(b) Serial-in, parallel, serial(c) Series-parallel-in, series, parallel(d) Bidirectional in, parallel, seriesThe question was asked in a job interview.This is a very interesting question from Shift Register Counters topic in portion Registers of Digital Circuits
Answer» Correct option is (a) Parallel-in, serial, parallel Easiest explanation: One bit shifting takes PLACE just after the output obtained on EVERY register. Hence, by ADDING recirculating lines to a 4-bit parallel-in serial-out shift register, it becomes a Parallel-in, Serial, and Parallel-out register. Since, the bots can be inputted all at the same TIME, while the data can be outputted either one at a time or simultaneously.

Discussion

19.	In a parallel in/parallel out shift register, D0 = 1, D1 = 1, D2 = 1, and D3 = 0. After three clock pulses, the data outputs are ________(a) 1110(b) 0001(c) 1100(d) 1000This question was addressed to me by my school principal while I was bunking the class.Query is from Shift Register Counters topic in portion Registers of Digital Circuits
Answer» Right option is (B) 0001 Easy explanation: Parallel in parallel out gives the same output as input. Thus, after THREE clock pulses, the data OUTPUTS are 0001.

Discussion

20.	A bidirectional 4-bit shift register is storing the nibble 1110. Its input is LOW. The nibble 0111 is waiting to be entered on the serial data-input line. After two clock pulses, the shift register is storing ________(a) 1110(b) 0111(c) 1000(d) 1001I had been asked this question in a national level competition.The above asked question is from Shift Register Counters topic in division Registers of Digital Circuits
Answer» The CORRECT CHOICE is (d) 1001 The BEST I can EXPLAIN: GIVEN,

Discussion

21.	When is it important to use a three-state buffer?(a) When two or more outputs are connected to the same input(b) When all outputs are normally HIGH(c) When all outputs are normally LOW(d) When two or more outputs are connected to two or more inputsThis question was addressed to me during an interview for a job.My query is from Shift Register Counters in division Registers of Digital Circuits
Answer» Right answer is (a) When TWO or more outputs are connected to the same INPUT For explanation: When two or more outputs are connected to the same input, in such situation we use of tristate buffer always because it has the capability to TAKE upto THREE inputs. A buffer is a CIRCUIT where the output follows the input.

Discussion

22.	What is a recirculating register?(a) Serial out connected to serial in(b) All Q outputs connected together(c) A register that can be used over again(d) Parallel out connected to Parallel inI had been asked this question in homework.Query is from Shift Register Counters in chapter Registers of Digital Circuits
Answer» The correct answer is (a) Serial out connected to serial in Explanation: A RECIRCULATING register is a register WHOSE serial output is connected to the serial input in a CIRCULATED MANNER.

Discussion

23.	An 8-bit serial in/serial out shift register is used with a clock frequency of 150 kHz. What is the time delay between the serial input and the Q3 output?(a) 1.67 s(b) 26.67 s(c) 26.7 ms(d) 267 msI have been asked this question in homework.Query is from Universal Shift Registers topic in section Registers of Digital Circuits
Answer» Right ANSWER is (b) 26.67 s The explanation: In serial-sifting, one bit of data is shifted one at a time. From Q0 to Q3 TOTAL of 4 bit shifting takes place. THEREFORE, 4/150kHz = 26.67 MICROSECONDS.

Discussion

24.	What is the difference between a ring shift counter and a Johnson shift counter?(a) There is no difference(b) A ring is faster(c) The feedback is reversed(d) The Johnson is fasterI got this question in semester exam.The doubt is from Universal Shift Registers in section Registers of Digital Circuits
Answer» CORRECT choice is (c) The FEEDBACK is reversed Best EXPLANATION: A ring counter is a shift register (a CASCADE connection of flip-flops) with the output of the last ONE connected to the input of the first, that is, in a ring. Whereas, a Johnson counter (or switchtail ring counter, twisted-ring counter, walking-ring counter, or Moebius counter) is a modified ring counter, where the output from the last stage is inverted and fed back as input to the first stage.

Discussion

25.	What are the three output conditions of a three-state buffer?(a) HIGH, LOW, float(b) High-Z, 0, float(c) Negative, positive, 0(d) 1, Low-Z, floatThe question was posed to me during an online exam.This question is from Universal Shift Registers in chapter Registers of Digital Circuits
Answer» Correct answer is (a) HIGH, LOW, float The BEST I can EXPLAIN: THREE conditions of a three-state buffer are HIGH, LOW & float.

Discussion

26.	The primary purpose of a three-state buffer is usually ____________(a) To provide isolation between the input device and the data bus(b) To provide the sink or source current required by any device connected to its output without loading down the output device(c) Temporary data storage(d) To control data flowThis question was addressed to me in a national level competition.This question is from Universal Shift Registers topic in portion Registers of Digital Circuits
Answer» Correct option is (a) To provide ISOLATION between the INPUT DEVICE and the data bus Explanation: The primary purpose of a three-state buffer is usually to provide isolation between the input device or peripheral DEVICES and the data bus. Three conditions of a three-state buffer are HIGH, LOW & float.

Discussion

27.	How is a strobe signal used when serially loading a shift register?(a) To turn the register on and off(b) To control the number of clocks(c) To determine which output Qs are used(d) To determine the FFs that will be usedI have been asked this question in semester exam.My question is based upon Universal Shift Registers topic in chapter Registers of Digital Circuits
Answer» Right option is (b) To CONTROL the number of clocks To explain I would say: A strobe is used to validate the availability of DATA on the data line. It (an auxiliary signal used to help SYNCHRONIZE the real data in an electrical bus when the bus components have no common clock) signal is used to control the number of clocks during SERIALLY loading a SHIFT register.

Discussion

28.	How many clock pulses will be required to completely load serially a 5-bit shift register?(a) 2(b) 3(c) 4(d) 5This question was addressed to me during an internship interview.My query is from Universal Shift Registers in portion Registers of Digital Circuits
Answer» The correct choice is (d) 5 To explain I would say: A register is a collection of FFS. To LOAD a bit, we require 1 clock PULSE for 1 shift register. So, for 5-bit shift register we would require of 5 clock PULSES.

Discussion

29.	A 4-bit shift register that receives 4 bits of parallel data will shift to the ________ by ________ position for each clock pulse.(a) Right, one(b) Right, two(c) Left, one(d) Left, threeI had been asked this question in my homework.My question is from Universal Shift Registers topic in portion Registers of Digital Circuits
Answer» The correct answer is (a) Right, one The BEST I can explain: If register SHIFTS towards LEFT then it shift by a bit to the left and if register shifts right then it shift to the right by one bit. Since, it receives parallel data, then by default, it will shift to right by one position.

Discussion

30.	An 8-bit serial in/serial out shift register is used with a clock frequency of 2 MHz to achieve a time delay (td) of ________(a) 16 us(b) 8 us(c) 4 us(d) 2 usThis question was posed to me by my college director while I was bunking the class.The origin of the question is Shift Registers in chapter Registers of Digital Circuits
Answer» Right CHOICE is (c) 4 us Easiest EXPLANATION: One clock period is = (^1⁄2) micro-s = 0.5 microseconds. In serial transmission, data enters one bit at a TIME. So, the total delay = 0.5*8 = 4 micro seconds time is required to transmit information of 8 BITS.

Discussion

31.	A sequence of equally spaced timing pulses may be easily generated by which type of counter circuit?(a) Ring shift(b) Clock(c) Johnson(d) BinaryI got this question in final exam.This intriguing question originated from Universal Shift Registers topic in portion Registers of Digital Circuits
Answer» Correct option is (a) Ring shift For explanation: In Ring counter, the FEEDBACK of the output of the FF is fed to the same FF’s input. Thus, it generates equally spaced timing pulses.

Discussion

32.	With a 200 kHz clock frequency, eight bits can be serially entered into a shift register in ________(a) 4 μs(b) 40 μs(c) 400 μs(d) 40 msThe question was asked in a national level competition.I would like to ask this question from Shift Registers in portion Registers of Digital Circuits
Answer» Right answer is (B) 40 μs To elaborate: f = 200 KHZ; T = (1/200) m sec = (1/0.2) micro-sec = 5 micro-sec; In serial TRANSMISSION, data enters ONE bit at a time. After 8 clock CYCLES only 8 bit will be loaded = 8 * 5 = 40 micro-sec.

Discussion

33.	Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first)(a) 1100(b) 0011(c) 0000(d) 1111The question was asked at a job interview.Asked question is from Shift Registers topic in division Registers of Digital Circuits
Answer» The CORRECT choice is (c) 0000 For explanation: In Serial-In/Serial-Out shift register, DATA will be SHIFTED ONE at a time with every clock pulse. Therefore, Wait \| Store 1100 \| 0000 110 \| 0000 1st clock 11 \| 0000 2nd clock.

Discussion

34.	A serial in/parallel out, 4-bit shift register initially contains all 1s. The data nibble 0111 is waiting to enter. After four clock pulses, the register contains ________(a) 0000(b) 1111(c) 0111(d) 1000The question was asked during a job interview.My question is based upon Shift Registers in portion Registers of Digital Circuits
Answer» Right option is (c) 0111 For explanation: In Serial-In/Parallel-Out shift register, data will be SHIFTED all at a TIME with every clock pulse. THEREFORE, Wait \| Store 0111 \| 0000 011 \| 1000 1st clk 01 \| 1100 2nd clk 0 \| 1110 3RD clk X \| 1111 4th clk.

Discussion

35.	How can parallel data be taken out of a shift register simultaneously?(a) Use the Q output of the first FF(b) Use the Q output of the last FF(c) Tie all of the Q outputs together(d) Use the Q output of each FFThe question was asked in exam.My doubt stems from Shift Registers in division Registers of Digital Circuits
Answer» Right OPTION is (d) USE the Q OUTPUT of each FF Explanation: Because no other flip-flops are connected with the output Q, THEREFORE one can use the Q out of each FF to take out parallel data.

Discussion

36.	The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains ________(a) 01110(b) 00001(c) 00101(d) 00110This question was addressed to me in an international level competition.This intriguing question comes from Shift Registers topic in chapter Registers of Digital Circuits
Answer» The CORRECT choice is (c) 00101 To EXPLAIN: LSB BIT is inverted and feed back to MSB: 01110->initial 10111->first CLOCK pulse 01011->second 00101->third.

Discussion

37.	What is meant by the parallel load of a shift register?(a) All FFs are preset with data(b) Each FF is loaded with data, one at a time(c) Parallel shifting of data(d) All FFs are set with dataThis question was addressed to me in an international level competition.Question is taken from Shift Registers in division Registers of Digital Circuits
Answer» The CORRECT OPTION is (a) All FFs are preset with data For EXPLANATION I would say: At Preset condition, outputs of flip-flops will be 1. Preset = 1 MEANS Q = 1, thus input is definitely 1.

Discussion

38.	The full form of SIPO is ___________(a) Serial-in Parallel-out(b) Parallel-in Serial-out(c) Serial-in Serial-out(d) Serial-In Peripheral-OutI have been asked this question in an internship interview.Query is from Shift Registers in portion Registers of Digital Circuits
Answer» Correct ANSWER is (a) Serial-in Parallel-out To explain I would SAY: SIPO is always KNOWN as Serial-in Parallel-out.

Discussion

39.	A shift register that will accept a parallel input or a bidirectional serial load and internal shift features is called as?(a) Tristate(b) End around(c) Universal(d) ConversionThe question was asked during an interview for a job.This key question is from Shift Registers topic in section Registers of Digital Circuits
Answer» The correct answer is (C) UNIVERSAL The BEST I can EXPLAIN: A shift register can shift it’s DATA either left or right. The universal shift register is capable of shifting data left, right and parallel load capabilities.

Discussion

40.	Based on how binary information is entered or shifted out, shift registers are classified into _______ categories.(a) 2(b) 3(c) 4(d) 5The question was posed to me in homework.My query is from Shift Registers in chapter Registers of Digital Circuits
Answer» Right option is (c) 4 Easy explanation: The REGISTERS in which data can be shifted serially or parallelly are KNOWN as shift registers. BASED on how binary information is entered or shifted out, shift registers are classified into 4 categories, viz.,Serial-In/Serial-Out(SISO), Serial-In/Parallel-Out (SIPO), Parallel-In/Serial-Out (PISO), Parallel-In/Parallel-Out (PIPO).

Discussion

41.	In serial shifting method, data shifting occurs ____________(a) One bit at a time(b) simultaneously(c) Two bit at a time(d) Four bit at a timeThe question was asked in an international level competition.My enquiry is from Registers in division Registers of Digital Circuits
Answer» The correct ANSWER is (a) One BIT at a time Easy explanation: As the name suggests serial SHIFTING, it MEANS that data shifting will take place one bit at a time for each clock PULSE in a serial fashion. While in parallel shifting, shifting will take place with all bits simultaneously for each clock pulse in a parallel fashion.

Discussion

42.	A shift register is defined as ___________(a) The register capable of shifting information to another register(b) The register capable of shifting information either to the right or to the left(c) The register capable of shifting information to the right only(d) The register capable of shifting information to the left onlyI had been asked this question during an interview.Question is from Registers topic in division Registers of Digital Circuits
Answer» RIGHT choice is (b) The register capable of shifting information either to the right or to the left The best explanation: The register capable of shifting information either to the right or to the left is termed as shift register. A register in which data can be SHIFTED only in one DIRECTION is called UNIDIRECTIONAL shift register, while if data can shifted in both directions, it is known as a bidirectional shift register.

Discussion

43.	How many methods of shifting of data are available?(a) 2(b) 3(c) 4(d) 5I had been asked this question in an online interview.This interesting question is from Registers topic in chapter Registers of Digital Circuits
Answer» RIGHT option is (a) 2 Best EXPLANATION: There are two types of SHIFTING of data are AVAILABLE and these are SERIAL shifting & parallel shifting.

Discussion

44.	In D register, ‘D’ stands for ___________(a) Delay(b) Decrement(c) Data(d) DecayThe question was asked during an interview.I need to ask this question from Registers topic in division Registers of Digital Circuits
Answer» Right answer is (C) DATA For EXPLANATION: D stands for “data” in case of flip-flops and not DELAY. REGISTERS are made of a group of flip-flops.

Discussion

45.	A register that is used to store binary information is called ___________(a) Data register(b) Binary register(c) Shift register(d) D – RegisterI have been asked this question during an interview.Question is from Registers in section Registers of Digital Circuits
Answer» Correct choice is (b) Binary register To elaborate: A register that is USED to store binary information is CALLED a binary register. A register in which DATA can be shifted is called shift register.

Discussion

46.	Registers capable of shifting in one direction is ___________(a) Universal shift register(b) Unidirectional shift register(c) Unipolar shift register(d) Unique shift registerI got this question in my homework.My question is taken from Registers in section Registers of Digital Circuits
Answer» Correct answer is (B) Unidirectional shift register Best explanation: The register CAPABLE of shifting in one DIRECTION is unidirectional shift register. The register capable of shifting in both DIRECTIONS is known as a BIDIRECTIONAL shift register.

Discussion

47.	The main difference between a register and a counter is ___________(a) A register has no specific sequence of states(b) A counter has no specific sequence of states(c) A register has capability to store one bit of information but counter has n-bit(d) A register counts dataI had been asked this question in an interview for job.I'd like to ask this question from Registers in chapter Registers of Digital Circuits
Answer» The CORRECT option is (a) A register has no SPECIFIC SEQUENCE of states The EXPLANATION is: The main difference between a register and a counter is that a register has no specific sequence of states except in certain SPECIALISED applications.

Discussion

48.	How many types of registers are?(a) 2(b) 3(c) 4(d) 5The question was asked during an interview.My doubt stems from Registers in portion Registers of Digital Circuits
Answer» Right choice is (C) 4 Easy explanation: There are 4 TYPES of shift REGISTERS, VIZ., Serial-In/Serial-Out, Serial-In/Parallel-Out, Parallel-In/Serial-Out and Parallel-In/Parallel-Out.

Discussion

49.	A register is defined as ___________(a) The group of latches for storing one bit of information(b) The group of latches for storing n-bit of information(c) The group of flip-flops suitable for storing one bit of information(d) The group of flip-flops suitable for storing binary informationI got this question by my school principal while I was bunking the class.I want to ask this question from Registers topic in chapter Registers of Digital Circuits
Answer» Right OPTION is (d) The group of flip-flops SUITABLE for storing BINARY information The best I can explain: A register is defined as the group of flip-flops suitable for storing binary information. Each flip-flop is a binary CELL capable of storing one bit of information. The DATA in a register can be transferred from one flip-flop to another.

Discussion

50.	The register is a type of ___________(a) Sequential circuit(b) Combinational circuit(c) CPU(d) LatchesThis question was addressed to me in class test.Query is from Registers topic in section Registers of Digital Circuits
Answer» Correct CHOICE is (a) SEQUENTIAL circuit Explanation: Register’s output depends on the past and present states of the inputs. The device which follows these properties is TERMED as a sequential circuit. WHEREAS, combinational circuits only depend on the present VALUES of inputs.

Discussion

Explore topic-wise InterviewSolutions in .

Which type of device may be used to interface a parallel data format with external equipment’s serial format?(a) UART(b) Key matrix(c) Memory chip(d) Series in Parallel outI got this question during an online exam.Query is from Ring Counter in chapter Registers of Digital Circuits

Ring shift and Johnson counters are ____________(a) Synchronous counters(b) Asynchronous counters(c) True binary counters(d) Synchronous and true binary countersThis question was addressed to me in homework.My enquiry is from Ring Counter topic in chapter Registers of Digital Circuits

How much storage capacity does each stage in a shift register represent?(a) One bit(b) Two bits(c) Four bits(d) Eight bitsI have been asked this question by my college director while I was bunking the class.The question is from Shift Register Counters in division Registers of Digital Circuits

In a 4-bit Johnson counter sequence, there are a total of how many states or bit patterns?(a) 1(b) 3(c) 4(d) 8I got this question during an interview for a job.I'd like to ask this question from Shift Register Counters in section Registers of Digital Circuits

What are the three output conditions of a three-state buffer?(a) HIGH, LOW, float(b) High-Z, 0, float(c) Negative, positive, 0(d) 1, Low-Z, floatThe question was posed to me during an online exam.This question is from Universal Shift Registers in chapter Registers of Digital Circuits

How many clock pulses will be required to completely load serially a 5-bit shift register?(a) 2(b) 3(c) 4(d) 5This question was addressed to me during an internship interview.My query is from Universal Shift Registers in portion Registers of Digital Circuits

A sequence of equally spaced timing pulses may be easily generated by which type of counter circuit?(a) Ring shift(b) Clock(c) Johnson(d) BinaryI got this question in final exam.This intriguing question originated from Universal Shift Registers topic in portion Registers of Digital Circuits

With a 200 kHz clock frequency, eight bits can be serially entered into a shift register in ________(a) 4 μs(b) 40 μs(c) 400 μs(d) 40 msThe question was asked in a national level competition.I would like to ask this question from Shift Registers in portion Registers of Digital Circuits

The full form of SIPO is ___________(a) Serial-in Parallel-out(b) Parallel-in Serial-out(c) Serial-in Serial-out(d) Serial-In Peripheral-OutI have been asked this question in an internship interview.Query is from Shift Registers in portion Registers of Digital Circuits

Based on how binary information is entered or shifted out, shift registers are classified into _______ categories.(a) 2(b) 3(c) 4(d) 5The question was posed to me in homework.My query is from Shift Registers in chapter Registers of Digital Circuits

In serial shifting method, data shifting occurs ____________(a) One bit at a time(b) simultaneously(c) Two bit at a time(d) Four bit at a timeThe question was asked in an international level competition.My enquiry is from Registers in division Registers of Digital Circuits

How many methods of shifting of data are available?(a) 2(b) 3(c) 4(d) 5I had been asked this question in an online interview.This interesting question is from Registers topic in chapter Registers of Digital Circuits

In D register, ‘D’ stands for ___________(a) Delay(b) Decrement(c) Data(d) DecayThe question was asked during an interview.I need to ask this question from Registers topic in division Registers of Digital Circuits

A register that is used to store binary information is called ___________(a) Data register(b) Binary register(c) Shift register(d) D – RegisterI have been asked this question during an interview.Question is from Registers in section Registers of Digital Circuits

Registers capable of shifting in one direction is ___________(a) Universal shift register(b) Unidirectional shift register(c) Unipolar shift register(d) Unique shift registerI got this question in my homework.My question is taken from Registers in section Registers of Digital Circuits

How many types of registers are?(a) 2(b) 3(c) 4(d) 5The question was asked during an interview.My doubt stems from Registers in portion Registers of Digital Circuits

The register is a type of ___________(a) Sequential circuit(b) Combinational circuit(c) CPU(d) LatchesThis question was addressed to me in class test.Query is from Registers topic in section Registers of Digital Circuits