A 4-bit shift register that receives 4 bits of parallel data will shift to the ________ by ________ position for each clock pulse.(a) Right, one(b) Right, two(c) Left, one(d) Left, threeI had been asked this question in my homework.My question is from Universal Shift Registers topic in portion Registers of Digital Circuits

A 4-bit shift register that receives 4 bits of parallel data will shif

1.	A 4-bit shift register that receives 4 bits of parallel data will shift to the ________ by ________ position for each clock pulse.(a) Right, one(b) Right, two(c) Left, one(d) Left, threeI had been asked this question in my homework.My question is from Universal Shift Registers topic in portion Registers of Digital Circuits
Answer» The correct answer is (a) Right, one The BEST I can explain: If register SHIFTS towards LEFT then it shift by a bit to the left and if register shifts right then it shift to the right by one bit. Since, it receives parallel data, then by default, it will shift to right by one position.

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