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In associative mapping during LRU, the counter of the new block is set to ‘0’ and all the others are incremented by one, when _____ occurs.(a) Delay(b) Miss(c) Hit(d) Delayed hitI had been asked this question in an online quiz.Question is from Cache Miss and Hit topic in portion Memory System of Computer Architecture |
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Answer» CORRECT option is (b) Miss For EXPLANATION: Miss usually occurs when the memory BLOCK required is not PRESENT in the cache. |
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