The added output of the bits of the interrupt register and the mask register is set as an input of ______________(a) Priority decoder(b) Priority encoder(c) Process id encoder(d) MultiplexerI had been asked this question in a national level competition.The query is from Interrupts topic in chapter Input/Output Organisation of Computer Architecture

The added output of the bits of the interrupt register and the mask re

1.	The added output of the bits of the interrupt register and the mask register is set as an input of ______________(a) Priority decoder(b) Priority encoder(c) Process id encoder(d) MultiplexerI had been asked this question in a national level competition.The query is from Interrupts topic in chapter Input/Output Organisation of Computer Architecture
Answer» The correct answer is (B) Priority encoder Easy explanation: In a parallel priority system, the priority of the device is obtained by ADDING the contents of the INTERRUPT register and the MASK register.

Discussion

No Comment Found

Related InterviewSolutions

The BSY signal signifies _________(a) The BUs is busy(b) The controller is busy(c) The Initiator is busy(d) The Target is BusyI got this question during an interview for a job.I'd like to ask this question from SCSI BUS-1 topic in portion Input/Output Organisation of Computer Architecture
In a data transfer operation involving SCSI BUS, the control is with ______(a) Initiator(b) Target(c) SCSI controller(d) Target ControllerThe question was posed to me in semester exam.My doubt is from SCSI BUS-1 topic in chapter Input/Output Organisation of Computer Architecture
The signal used to initiate device select ________(a) IRDY#(b) S/BE(c) DEVSEL#(d) IDSEL#This question was addressed to me by my college director while I was bunking the class.I'm obligated to ask this question of PCI BUS-2 topic in chapter Input/Output Organisation of Computer Architecture
The PCI BUS has _____ interrupt request lines.(a) 6(b) 1(c) 4(d) 3This question was addressed to me in an interview for internship.The doubt is from PCI BUS-2 in portion Input/Output Organisation of Computer Architecture
To overcome the conflict over the possession of the BUS we use ______(a) Optimizers(b) BUS arbitrators(c) Multiple BUS structure(d) None of the mentionedThis question was posed to me during an interview.This is a very interesting question from Direct Memory Access topic in section Input/Output Organisation of Computer Architecture
What is the full form of ANSI?(a) American National Standards Institute(b) Architectural National Standards Institute(c) Asian National Standards Institute(d) None of the mentionedThis question was posed to me in unit test.My question is taken from Standard I/O Interfaces topic in portion Input/Output Organisation of Computer Architecture
The technique whereby the DMA controller steals the access cycles of the processor to operate is called __________(a) Fast conning(b) Memory Con(c) Cycle stealing(d) Memory stealingI have been asked this question by my college director while I was bunking the class.Question is taken from Direct Memory Access in portion Input/Output Organisation of Computer Architecture
The DMA differs from the interrupt mode by __________(a) The involvement of the processor for the operation(b) The method of accessing the I/O devices(c) The amount of data transfer possible(d) None of the mentionedI have been asked this question in examination.Origin of the question is Direct Memory Access in chapter Input/Output Organisation of Computer Architecture
Interrupts form an important part of _____ systems.(a) Batch processing(b) Multitasking(c) Real-time processing(d) Multi-userThe question was asked in exam.This question is from Interrupts in chapter Input/Output Organisation of Computer Architecture
In vectored interrupts, how does the device identify itself to the processor?(a) By sending its device id(b) By sending the machine code for the interrupt service routine(c) By sending the starting address of the service routine(d) None of the mentionedI got this question in an interview.Question is taken from Interrupts in section Input/Output Organisation of Computer Architecture

Discussion

No Comment Found

Related InterviewSolutions

Reply to Comment