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This section includes InterviewSolutions, each offering curated multiple-choice questions to sharpen your knowledge and support exam preparation. Choose a topic below to get started.

101.

Which of the following IC is TTL based static RAM?(a) IC 7488(b) IC 7489(c) IC 7487(d) IC 2114I have been asked this question in exam.My enquiry is from Random Access Memory in section Memory Devices of Digital Circuits

Answer»

Correct option is (B) IC 7489

For EXPLANATION I would say: The flip-flop in the static memory cell can be constructed using Bipolar JUNCTION Transistor (BJT) and MOSFETs because of it’s STORING capability. Also, it’s access time is less and it is faster in operation. In IC 7489, TTL is used which is static RAM.

102.

When the READ/(WRITE)’ line is HIGH then the flip-flop is ____________(a) Activated(b) Deactivated(c) Unaffected(d) Both activated and deactivatedI got this question during an online exam.I need to ask this question from Random Access Memory topic in chapter Memory Devices of Digital Circuits

Answer»

Right OPTION is (c) Unaffected

To elaborate: When the READ/(WRITE)’ line is HIGH then the flip-flop is unaffected since it’s an active low PIN. It means that the stored BIT (DATA) is gated to the data out line.

103.

The input data bit is written into the cell by setting ____________(a) The flip-flop for 1(b) Resetting the flip-flop(c) The flip-flop for HIGH(d) Both the flip-flop for 1 and resetting the flip-flopThe question was posed to me during an interview.The doubt is from Random Access Memory in section Memory Devices of Digital Circuits

Answer»

Correct choice is (d) Both the flip-flop for 1 and resetting the flip-flop

Easiest EXPLANATION: The input data bit (1 or 0) is written into the CELL by SETTING the flip-flop for 1 and the resetting the flip-flop for a 0 when the R/W’ line is LOW, R/W is active-low pin.

104.

The memory capacity of a static RAM varies from ____________(a) 32 bit to 64 bit(b) 64 bit to 1024 bit(c) 64 bit to 1 Mega bit(d) 512 bit to 1 Mega bitThe question was asked in semester exam.I would like to ask this question from Random Access Memory in division Memory Devices of Digital Circuits

Answer»

The CORRECT ANSWER is (c) 64 BIT to 1 Mega bit

Easy explanation: Static RAM(SRAM ) is faster than dynamic RAM(DRAM) as the access time for DRAM is more COMPARED to that of SRAM. The memory capacity of a static RAM varies from 64 bits to 1 Mega bit.

105.

The data written in flip-flop remains stored as long as __________(a) D.C. power is supplied(b) D.C. power is removed(c) A.C. power is supplied(d) A.C. power is removedThis question was posed to me in an internship interview.This interesting question is from Random Access Memory topic in chapter Memory Devices of Digital Circuits

Answer»
106.

The magnetic core memories have been replaced by semiconductor RAMs, why?(a) Semiconductor RAMs are highly flexible(b) Semiconductor RAMs have highest storing capacity(c) Semiconductor RAMs are smaller in size(d) All of the MentionedThe question was posed to me during a job interview.Question is taken from Random Access Memory in section Memory Devices of Digital Circuits

Answer»

The correct OPTION is (d) All of the Mentioned

Explanation: RAM is a volatile memory, therefore it stores data as long as power is on. RAM is also known as RWM (i.e. Read Write Memory). The MAGNETIC CORE memories have been replaced by semiconductor RAMS because of smaller in size, high storing capacity as well as flexibility.

107.

Which one of the following is volatile in nature?(a) ROM(b) EROM(c) PROM(d) RAMThis question was addressed to me in an online quiz.I want to ask this question from Random Access Memory topic in chapter Memory Devices of Digital Circuits

Answer»

Correct choice is (d) RAM

The best explanation: RAM is a volatile MEMORY, THEREFORE it stores data as long as power is on. RAM is also known as RWM (i.e. READ Write Memory). RAMs are volatile because the STORED data will be lost once the d.c. power applied to the flip-flops is removed.

108.

Dynamic RAM employs __________(a) Capacitor or MOSFET(b) FET or JFET(c) Capacitor or BJT(d) BJT or MOSI had been asked this question during an interview.The above asked question is from Random Access Memory in chapter Memory Devices of Digital Circuits

Answer»

The correct CHOICE is (a) Capacitor or MOSFET

Easy explanation: Dynamic RAM employs a capacitor or MOSFET. Thus, it’s ACCESS time is more and it is slower in operation.

109.

Static RAM employs __________(a) BJT or MOSFET(b) FET or JFET(c) Capacitor or BJT(d) BJT or MOSThe question was asked in semester exam.Question is from Random Access Memory in chapter Memory Devices of Digital Circuits

Answer»

The correct choice is (d) BJT or MOS

The explanation: STATIC RAM EMPLOYS bipolar or MOS flip-flops because both the semiconductor has storing CAPACITY. Thus, it’s access TIME is less and it is faster in operation.

110.

How many types of RAMs are?(a) 2(b) 3(c) 4(d) 5The question was posed to me in quiz.Question is taken from Random Access Memory in chapter Memory Devices of Digital Circuits

Answer»

The correct answer is (a) 2

For explanation: There are two TYPES of RAM and these are STATIC and dynamic. Static RAM(SRAM) is FASTER than dynamic RAM(DRAM) as the access time for DRAM is more compared to that of SRAM.

111.

Which of the following control signals are selected for read and write operations in a RAM?(a) Data buffer(b) Chip select(c) Read and write(d) MemoryThis question was addressed to me in semester exam.This interesting question is from Random Access Memory in section Memory Devices of Digital Circuits

Answer»
112.

Computers invariably use RAM for __________(a) High complexity(b) High resolution(c) High speed main memory(d) High flexibilityI got this question during an interview for a job.Query is from Random Access Memory topic in section Memory Devices of Digital Circuits

Answer»

Right option is (c) High speed main MEMORY

To explain: RAM is a VOLATILE memory, THEREFORE it stores data as long as power is on. RAM is also known as RWM (i.e. Read Write Memory). Computers INVARIABLY use RAM for their high high-speed main memory and then use backup or slower-speed memories to hold auxiliary data.

113.

The n-bit address is placed in the __________(a) MBR(b) MAR(c) RAM(d) ROMThe question was asked in an internship interview.I'm obligated to ask this question of Random Access Memory topic in division Memory Devices of Digital Circuits

Answer»
114.

If a RAM chip has n address input lines then it can access memory locations upto __________(a) 2^(n-1)(b) 2^(n+1)(c) 2^n(d) 2^2nThe question was asked in a national level competition.I would like to ask this question from Random Access Memory topic in division Memory Devices of Digital Circuits

Answer»

The correct option is (c) 2^n

Easiest EXPLANATION: RAM is a volatile memory, therefore it STORES DATA as long as power is on. RAM is also known as RWM (i.e. Read Write Memory). If a RAM chip has n ADDRESS INPUT lines then it can access memory locations upto 2^n.

115.

RAM is also known as __________(a) RWM(b) MBR(c) MAR(d) ROMThis question was addressed to me at a job interview.Question is from Random Access Memory topic in division Memory Devices of Digital Circuits

Answer»

The correct choice is (a) RWM

Explanation: A Random ACCESS Memory (RAM) is a volatile CHIP memory in which both the READ and write operations can be performed. Since it is volatile, therefore it stores data as long as power is on. RAM is ALSO KNOWN as RWM (i.e. Read Write Memory).

116.

The chip by which both the operation of read and write is performed __________(a) RAM(b) ROM(c) PROM(d) EPROMThe question was posed to me in a national level competition.This question is from Random Access Memory topic in section Memory Devices of Digital Circuits

Answer»

Right choice is (a) RAM

For EXPLANATION: A Random Access Memory (RAM) is a volatile CHIP memory in which both the READ and WRITE operations can be performed. Since it is volatile, therefore it stores data as long as power is on.

117.

Which of the following is not a type of memory?(a) RAM(b) FPROM(c) EEPROM(d) ROMI have been asked this question in an online quiz.This intriguing question originated from Random Access Memory topic in section Memory Devices of Digital Circuits

Answer»

Right choice is (c) EEPROM

The BEST I can explain: EEPROM (ELECTRICAL Erasable Programmable ROM) is not a type of MEMORY because it is used for erasing purpose only. Through EEPROM, data can be ERASED electrically, thereby consuming less time.

118.

What is the access time?(a) The time taken to move a stored word from one bit to other bits after applying the address bits(b) The time taken to write a word after applying the address bits(c) The time taken to read a stored word after applying the address bits(d) The time taken to erase a stored word after applying the address bitsI got this question during a job interview.My question is from Random Access Memory topic in chapter Memory Devices of Digital Circuits

Answer»

The CORRECT CHOICE is (c) The time taken to read a stored WORD after applying the address BITS

Best explanation: The access time is the time taken to read a stored word after applying the address bits in a MOS EPROM. It is the time required to fetch DATA from the memory.

119.

What are the typical values of tOE?(a) 10 to 20 ns for bipolar(b) 25 to 100 ns for NMOS(c) 12 to 50 ns for CMOS(d) All of the MentionedI got this question by my college director while I was bunking the class.My doubt is from Random Access Memory topic in portion Memory Devices of Digital Circuits

Answer» CORRECT option is (d) All of the Mentioned

Easy explanation: The access time is the time taken to read a stored word after APPLYING the address bits in a MOS EPROM. It is the time required to fetch data from the memory. The typical values of tOE (i.e. access time) are 10 to 20 NS for bipolar, 25 to 100 ns for NMOS and 12 to 50 ns for CMOS.
120.

What is the difference between static RAM and dynamic RAM?(a) Static RAM must be refreshed, dynamic RAM does not(b) There is no difference(c) Dynamic RAM must be refreshed, static RAM does not(d) SRAM is slower than DRAMThis question was addressed to me during a job interview.I need to ask this question from Erasable Programmable Read Only Memory in division Memory Devices of Digital Circuits

Answer»

Correct choice is (c) DYNAMIC RAM must be refreshed, static RAM does not

The explanation is: Dynamic RAM must be refreshed because it MADE up of capacitor, and capacitor REQUIRED refresh. Static RAM made up of flip flop and it doesn’t required a refresh.

121.

Suppose that a certain semiconductor memory chip has a capacity of 8K × 8. How many bytes could be stored in this device?(a) 8,000(b) 65,536(c) 8,192(d) 64,000I got this question in an interview.This question is from Erasable Programmable Read Only Memory in section Memory Devices of Digital Circuits

Answer»

The CORRECT option is (C) 8,192

Easiest EXPLANATION: 8K = 8 * 1024 = 8192.

122.

When a RAM module passes the checker board test it is ______________(a) Able to read and write only 0s(b) Faulty(c) Probably good(d) Able to read and write only 1sThe question was posed to me in examination.My doubt stems from Erasable Programmable Read Only Memory in section Memory Devices of Digital Circuits

Answer»

Correct choice is (C) Probably good

To explain I would SAY: When a RAM MODULE passes the CHECKER board test it is probably good. It is a volatile memory. Thus, RAM stores the data as long as it is powered on and once the POWER goes out, it loses its data.

123.

ROMs retain data when ______________(a) Power is on(b) Power is off(c) System is down(d) All of the MentionedThe question was asked in homework.The above asked question is from Erasable Programmable Read Only Memory in division Memory Devices of Digital Circuits

Answer»

Right ANSWER is (d) All of the Mentioned

The explanation: ROM RETAINS the DATA when power is off/on/down because it has to read the data from memory only and it is done in every condition. It is non-volatile memory.

124.

To read from the memory, the select input and the power down/program input must be ______________(a) HIGH(b) LOW(c) Sometimes HIGH and sometimes LOW(d) Alternate HIGH and LOWThis question was posed to me during an online exam.The origin of the question is Erasable Programmable Read Only Memory topic in portion Memory Devices of Digital Circuits

Answer»

Right ANSWER is (b) LOW

The explanation is: To read from the memory, the SELECT input and the power down/program input MUST be LOW.

125.

Which one of the following is used for the fabrication of MOS EPROM?(a) TMS 2513(b) TMS 2515(c) TMS 2516(d) TMS 2518This question was posed to me in an international level competition.Query is from Erasable Programmable Read Only Memory topic in portion Memory Devices of Digital Circuits

Answer»

The correct option is (C) TMS 2516

Best explanation: EPROMS are Erasable Programmable ROMs which can be erased using UV RADIATION and re-programmed. TMS 2516 is a MOS EPROM device.

126.

How many addresses a MOS EPROM have?(a) 1024(b) 512(c) 2516(d) 256This question was posed to me during an interview for a job.Query is from Erasable Programmable Read Only Memory topic in division Memory Devices of Digital Circuits

Answer»

Right option is (c) 2516

Best EXPLANATION: EPROMs are ERASABLE Programmable ROMS which can be erased using UV RADIATION and re-programmed. MOS EPROM (i.e. TMS 2516) has 2048 (2^11 = 2048) ADDRESSES.

127.

The major disadvantage of RAM is?(a) Its access speed is too slow(b) Its matrix size is too big(c) It is volatile(d) High power consumptionThe question was asked in an online interview.This intriguing question originated from Erasable Programmable Read Only Memory in section Memory Devices of Digital Circuits

Answer»

Right choice is (c) It is volatile

Explanation: RAM is volatile MEMORY. Thus, RAM stores the DATA as long as it is POWERED on and once the POWER goes out, it loses its data.

128.

To store 0 in such a cell, the floating point must be ______________(a) Reprogrammed(b) Restarted(c) Charged(d) Power offI had been asked this question in class test.Origin of the question is Erasable Programmable Read Only Memory in chapter Memory Devices of Digital Circuits

Answer»

Correct choice is (C) Charged

Explanation: EPROMs are Erasable Programmable ROMS which can be erased using UV radiation and re-programmed. To store 0 in the CELL of an EPROM, the floating point must be charged.

129.

The check sum method of testing a ROM ______________(a) Allows data errors to be pinpointed to a specific memory location(b) Provides a means for locating and correcting data errors in specific memory locations(c) Indicates if the data in more than one memory location is incorrect(d) Simply indicates that the contents of the ROM are incorrectThis question was posed to me in homework.Asked question is from Erasable Programmable Read Only Memory topic in chapter Memory Devices of Digital Circuits

Answer»

The CORRECT CHOICE is (d) Simply indicates that the CONTENTS of the ROM are incorrect

To elaborate: If CHECKING of a SUM method goes wrong, it simply indicates that the contents of the ROM are incorrect.

130.

The initial values in all the cells of an EPROM is ______________(a) 0(b) 1(c) Both 0 and 1(d) Alternate 0s and 1sI have been asked this question during an internship interview.This interesting question is from Erasable Programmable Read Only Memory topic in division Memory Devices of Digital Circuits

Answer»

Right CHOICE is (B) 1

Explanation: The initial VALUES in all the cells of an EPROM is 1.

131.

Which of the following describes the action of storing a bit of data in a mask ROM?(a) A 0 is stored by connecting the gate of a MOS cell to the address line(b) A 0 is stored in a bipolar cell by shorting the base connection to the address line(c) A 1 is stored by connecting the gate of a MOS cell to the address line(d) A 1 is stored in a bipolar cell by opening the base connection to the address lineThis question was addressed to me in an interview.I want to ask this question from Erasable Programmable Read Only Memory topic in division Memory Devices of Digital Circuits

Answer»

Correct option is (c) A 1 is stored by connecting the gate of a MOS CELL to the address line

The EXPLANATION is: The action of storing a bit of data in a mask ROM is that when a 1 is stored by connecting the gate of a MOS cell to the address line. Mask ROMS are PROGRAMMED by the manufacturer and are CUSTOM made as per the user.

132.

Address decoding for dynamic memory chip control may also be used for ______________(a) Chip selection and address location(b) Read and write control(c) Controlling refresh circuits(d) Memory mappingThis question was posed to me in homework.My doubt is from Erasable Programmable Read Only Memory in division Memory Devices of Digital Circuits

Answer»

Correct option is (a) Chip SELECTION and address location

To explain I would say: Address decoding for dynamic MEMORY chip control MAY also be used for chip selection and address location. Chip Selection ENABLES or DISABLES the functioning of the chip.

133.

The EPROM was invented by ______________(a) Wen Tsing Chow(b) Dov Frohman(c) Luis O Brian(d) J P LongwellThe question was posed to me at a job interview.My question is taken from Erasable Programmable Read Only Memory in division Memory Devices of Digital Circuits

Answer»

The correct option is (b) Dov Frohman

Easy explanation: The EPROM was invented by Dov Frohman of Intel in 1971. EPROMs are ERASABLE PROGRAMMABLE ROMs which can be erased using UV RADIATION and re-programmed.

134.

EPROM uses an array of _______________(a) p-channel enhancement type MOSFET(b) n-channel enhancement type MOSFET(c) p-channel depletion type MOSFET(d) n-channel depletion type MOSFETI got this question in an international level competition.My doubt is from Erasable Programmable Read Only Memory in section Memory Devices of Digital Circuits

Answer»

Right option is (b) n-channel enhancement TYPE MOSFET

Explanation: EPROMs are Erasable Programmable ROMS which can be ERASED using UV radiation and re-programmed. EPROM uses an array of n-channel enhancement type MOSFET with an INSULATED gate STRUCTURE.

135.

How many address bits are needed to operate a 2K * 8-bit memory?(a) 10(b) 11(c) 12(d) 13I got this question in an interview for job.My question is based upon Programmable Read Only Memory in chapter Memory Devices of Digital Circuits

Answer»

Correct answer is (b) 11

To EXPLAIN I would say: For N address bits, the memory LOCATION will consist of 2^n bits. Thus, for 2K, only 11 address bits are required, because 2^11 = 2K.

136.

What is the bit storage capacity of a ROM with a 1024 × 8 organization?(a) 1024(b) 4096(c) 2048(d) 8192I have been asked this question during an internship interview.The doubt is from Programmable Read Only Memory topic in chapter Memory Devices of Digital Circuits

Answer»

Correct CHOICE is (d) 8192

For explanation I would say: For N ADDRESS bits, the memory location will CONSIST of 2^n bits. 1024 = 2^10. So, 2^10 * 2^3 = 1024 * 8 = 8192 bit.

137.

How many memory locations are addressed using 18 address bits?(a) 165,667(b) 245,784(c) 262,144(d) 212,342This question was addressed to me during an interview.This is a very interesting question from Programmable Read Only Memory in portion Memory Devices of Digital Circuits

Answer»

The correct choice is (C) 262,144

Explanation: For N ADDRESS BITS, the memory location will consist of 2^n bits. USING 18 address bits, 2^18 = 262,144 (= 256 K) words are addressed.

138.

IC 74186 is of ______________(a) 1024 bits(b) 32 bits(c) 512 bits(d) 64 bitsThe question was posed to me in an internship interview.This intriguing question originated from Programmable Read Only Memory in division Memory Devices of Digital Circuits

Answer»

Right CHOICE is (C) 512 bits

Explanation: IC 74186 is of 512 bits (62 * 8 = 512). Thus, it has 62 rows and 8 columns.

139.

For the implementation of PROM, which IC is used?(a) IC 74187(b) IC 74186(c) IC 74185(d) IC 74184The question was posed to me in a job interview.My question is based upon Programmable Read Only Memory in section Memory Devices of Digital Circuits

Answer»

Correct OPTION is (b) IC 74186

Easy explanation: For implementation of PROM, IC 74186 is used. IC 74186 is of 512 bits (62 * 8 = 512). Thus, it has 62 ROWS and 8 columns.

140.

The PROM starts out with _____________(a) 1s(b) 0s(c) Null(d) Both 1s and 0sThis question was posed to me in an international level competition.I'm obligated to ask this question of Programmable Read Only Memory in chapter Memory Devices of Digital Circuits

Answer»

Right choice is (B) 0S

The explanation is: PROM is a one-time programmable device, which is programmed by the user. The PROM STARTS out with all 0s. These current pulses blow the FUSE links, thus creating the desire pattern.

141.

PROM is programmed by _____________(a) EPROM programmer(b) EEPROM programmer(c) PROM programmer(d) ROM programmerThe question was posed to me in quiz.Asked question is from Programmable Read Only Memory in portion Memory Devices of Digital Circuits

Answer»

Correct answer is (c) PROM PROGRAMMER

To explain: PROM is PROGRAMMED by plugging it into a special DEVICE CALLED PROM programmer. The ROM cannot be clear and hence PROM is a one-time programmable device.

142.

During programming p-n junction is _____________(a) Avalanche reverse biased(b) Avalanche forward biased(c) Zener reverse biased(d) Zener reverse biasedI had been asked this question in final exam.The origin of the question is Programmable Read Only Memory topic in division Memory Devices of Digital Circuits

Answer»

Right ANSWER is (a) Avalanche reverse biased

Easiest EXPLANATION: The sudden heavy FLOW of electrons in the reverse direction and heat CAUSE aluminium ions to migrate. So, during PROGRAMMING p-n junction is avalanche reversed biased.

143.

The full form of FAMOS is _____________(a) Floating Gate Avalanche Injection MOS(b) Float Gate Avalanche Injection MOS(c) Floating Gate Avalanche Induction MOS(d) Float Gate Avalanche Induction MOSI had been asked this question in examination.My doubt is from Programmable Read Only Memory in section Memory Devices of Digital Circuits

Answer» RIGHT OPTION is (a) Floating Gate Avalanche Injection MOS

To explain I would say: The full form of FAMOS is Floating Gate Avalanche Injection MOS. It is a floating gate transistor in which the trapped ELECTRONS is responsible for the DROPPING of the VOLTAGE.
144.

How many types of fuse technologies are used in PROMs?(a) 2(b) 3(c) 4(d) 5The question was posed to me in examination.Question is from Programmable Read Only Memory topic in section Memory Devices of Digital Circuits

Answer»

Right answer is (b) 3

The best I can explain: Fusing is a process by which programs are burnout to the diode/transistors and it can not be reprogrammed if any error occurs. Three types of fuse technologies are used in PROMs and these are: (i) METAL LINKS, (II) SILICON links, & (iii) p-n junctions.

145.

Metal links are made up of ___________(a) Polycrystalline(b) Magnesium sulphide(c) Nichrome(d) Silicon dioxideThis question was addressed to me in an international level competition.This question is from Programmable Read Only Memory topic in portion Memory Devices of Digital Circuits

Answer» RIGHT option is (c) NICHROME

The explanation is: Metal links are made up of Nichrome MATERIALS.
146.

Silicon links are made up of _____________(a) Polycrystalline silicon(b) Polycrystalline magnesium(c) Nichrome(d) Silicon dioxideThe question was posed to me in final exam.The above asked question is from Programmable Read Only Memory in section Memory Devices of Digital Circuits

Answer» CORRECT CHOICE is (a) POLYCRYSTALLINE silicon

To ELABORATE: Metal links are made up of Nichrome materials. Silicon links are made up of polycrystalline silicon.
147.

Fusing process is ___________(a) Reversible(b) Irreversible(c) Synchronous(d) AsynchronousI got this question in exam.Origin of the question is Programmable Read Only Memory in portion Memory Devices of Digital Circuits

Answer» RIGHT OPTION is (b) Irreversible

Explanation: SINCE, any program cannot be reprogrammed in a PROM, so this process is irreversible as PROMS are programmed using the Fusing process. Fusing is a process by which programs are burnout to the diode/transistors and it can not be reprogrammed if any error OCCURS.
148.

The cell type used inside a PROM is ___________(a) Link cells(b) Metal cells(c) Fuse cells(d) Electric cellsI got this question in quiz.I'd like to ask this question from Programmable Read Only Memory topic in section Memory Devices of Digital Circuits

Answer»

The CORRECT ANSWER is (C) Fuse cells

To explain: The cell type USED inside a PROM is fuse cells by which a program is burnout. Fusing is a process by which programs are burnout to the diode/transistors and it can not be REPROGRAMMED if any error occurs.

149.

How much locations an 8-bit address code can select in memory?(a) 8 locations(b) 256 locations(c) 65,536 locations(d) 131,072 locationsThe question was posed to me in quiz.This key question is from Programmable Read Only Memory in chapter Memory Devices of Digital Circuits

Answer»

Right option is (b) 256 locations

Best explanation: An 8 BIT address CODE requires 32 MEMORY locations and it can hold maximum upto 32 * 8 = 256 locations = 2^8.

150.

What is a fusing process?(a) It is a process by which data is passed to the memory(b) It is a process by which data is read through the memory(c) It is a process by which programs are burnout to the diode/transistors(d) It is a process by which data is fetched through the memoryThis question was addressed to me by my college director while I was bunking the class.Enquiry is from Programmable Read Only Memory in chapter Memory Devices of Digital Circuits

Answer»

Correct choice is (c) It is a process by which programs are BURNOUT to the diode/transistors

Best EXPLANATION: FUSING is a process by which programs are burnout to the diode/transistors and it can not be reprogrammed if any ERROR OCCURS.