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How buffers are enabled in the parallel ports?(a) by the data register(b) by data direction register(c) by individual control register(d) by data and individual control registerI had been asked this question in homework.My question comes from Parallel Ports topic in portion Basic Peripherals of Embedded Systems

Answer»

Right option is (b) by data direction REGISTER

To elaborate: The implementation of parallel PORT uses a couple of BUFFERS which are enabled by the data direction register by setting the CORRESPONDING bit of the register.



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