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Which of the signal can control bus arbitration logic in 8250?(a) MR(b) DDIS(c) INTR(d) RCLKI have been asked this question in exam.This interesting question is from UART topic in division Basic Peripherals of Embedded Systems

Answer»

Right CHOICE is (b) DDIS

Easiest explanation: DDIS signal GOES low when the CPU is READING data from the UART and it also CONTROLS the bus ARBITRATION logic.



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